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Travelled to:
3 × USA
Collaborated with:
V.Sarin W.Shi M.Zhao R.Panda Y.Fu S.Sundareswaran B.Reschke T.Mewett S.Chandrasekaran
Talks about:
capacit (3) decoupl (2) chip (2) precondition (1) macromodel (1) transform (1) algorithm (1) hierarch (1) dielectr (1) program (1)

Person: Shu Yan

DBLP DBLP: Yan:Shu

Contributed to:

DAC 20072007
DAC 20062006
DAC 20042004

Wrote 3 papers:

DAC-2007-ZhaoPRFMCSY
On-Chip Decoupling Capacitance and P/G Wire Co-optimization for Dynamic Noise (MZ, RP, BR, YF, TM, SC, SS, SY), pp. 162–167.
DAC-2006-ZhaoPSYF #algorithm #linear #megamodelling #performance #programming #using
A fast on-chip decoupling capacitance budgeting algorithm using macromodeling and linear programming (MZ, RP, SS, SY, YF), pp. 217–222.
DAC-2004-YanSS #3d #multi
Sparse transformations and preconditioners for hierarchical 3-D capacitance extraction with multiple dielectrics (SY, VS, WS), pp. 788–793.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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