`Travelled to:`

1 × Germany

8 × USA

`Collaborated with:`

Z.Li Z.Jiang V.Sarin P.Li S.Hu C.J.Alpert J.Hu C.C.N.Sze N.Y.Zhou M.Waghmode S.Yan H.Mahawar J.Liu N.Kakani T.Yu S.K.Karandikar

`Talks about:`

buffer (7) algorithm (5) insert (5) extract (4) capacit (3) fast (3) hierarch (2) dielectr (2) circuit (2) method (2)

## Person: Weiping Shi

### DBLP: Shi:Weiping

### Contributed to:

### Wrote 12 papers:

- DAC-2008-JiangS #algorithm #scalability
- Circuit-wise buffer insertion and gate sizing algorithm with scalability (ZJ, WS), pp. 708–713.
- DAC-2007-JiangHS #design #difference
- A New Twisted Differential Line Structure in Global Bus Design (ZJ, SH, WS), pp. 180–183.
- DAC-2007-ZhouLS #bound #embedded #hybrid #multi #performance #using
- Fast Capacitance Extraction in Multilayer, Conformal and Embedded Dielectric using Hybrid Boundary Element Method (NYZ, ZL, WS), pp. 835–840.
- DAC-2006-HuAHKLSS #algorithm #performance
- Fast algorithms for slew constrained minimum cost buffering (SH, CJA, JH, SKK, ZL, WS, CCNS), pp. 308–313.
- DAC-2006-LiS #linear #network #order #reduction
- Model order reduction of linear networks with massive ports via frequency-dependent port packing (PL, WS), pp. 267–272.
- DAC-2006-WaghmodeLS #scalability
- Buffer insertion in large circuits with constructive solution search techniques (MW, ZL, WS), pp. 296–301.
- DAC-2005-SzeAHS
- Path based buffer insertion (CCNS, CJA, JH, WS), pp. 509–514.
- DATE-2005-LiS05a #algorithm
- An O(bn2) Time Algorithm for Optimal Buffer Insertion with b Buffer Types (ZL, WS), pp. 1324–1329.
- DAC-2004-YanSS #3d #multi
- Sparse transformations and preconditioners for hierarchical 3-D capacitance extraction with multiple dielectrics (SY, VS, WS), pp. 788–793.
- DAC-2003-ShiL #algorithm
- An O(nlogn) time algorithm for optimal buffer insertion (WS, ZL), pp. 580–585.
- DAC-2002-MahawarSS #performance
- A solenoidal basis method for efficient inductance extraction (HM, VS, WS), pp. 751–756.
- DAC-1998-ShiLKY #3d #algorithm #performance
- A Fast Hierarchical Algorithm for 3-D Capacitance Extraction (WS, JL, NK, TY), pp. 212–217.