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Travelled to:
1 × USA
Collaborated with:
S.B.K.Vrudhula J.M.Wang
Talks about:
methodolog (1) process (1) presenc (1) variat (1) improv (1) yield (1) time (1)

Person: Sreeja Raj

DBLP DBLP: Raj:Sreeja

Contributed to:

DAC 20042004

Wrote 1 papers:

DAC-2004-RajVW #process
A methodology to improve timing yield in the presence of process variations (SR, SBKV, JMW), pp. 448–453.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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