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Travelled to:
2 × Germany
2 × USA
Collaborated with:
Q.Yu E.S.Kuh S.B.K.Vrudhula J.Li T.V.Nguyen B.B.Sukhwani U.Padmanabhan S.Raj O.Hafiz P.Ghanta R.Panda Y.S.Kumar C.Talarico
Talks about:
model (4) base (4) interconnect (3) process (3) variat (3) statist (2) multipl (2) circuit (2) analysi (2) method (2)

Person: Janet Meiling Wang

DBLP DBLP: Wang:Janet_Meiling

Contributed to:

DATE 20052005
DAC 20042004
DAC 20002000
DATE 19991999

Wrote 8 papers:

DATE-2005-GhantaVPW #analysis #grid #power management #probability #process
Stochastic Power Grid Analysis Considering Process Variations (PG, SBKV, RP, JMW), pp. 964–969.
DATE-2005-KumarLTW #multi #probability #process #statistics
A Probabilistic Collocation Method Based Statistical Gate Delay Model Considering Process Variations and Multiple Input Switching (YSK, JL, CT, JMW), pp. 770–775.
DATE-2005-SukhwaniPW #design #named #statistics
Nano-Sim: A Step Wise Equivalent Conductance based Statistical Simulator for Nanotechnology Circuit Design (BBS, UP, JMW), pp. 758–763.
DAC-2004-RajVW #process
A methodology to improve timing yield in the presence of process variations (SR, SBKV, JMW), pp. 448–453.
DAC-2004-WangHL #linear #nondeterminism #parametricity
A linear fractional transform (LFT) based model for interconnect parametric uncertainty (JMW, OH, JL), pp. 375–380.
DAC-2000-WangN #analysis #linear #multi #order
Extended Krylov subspace method for reduced order analysis of linear circuits with multiple sources (JMW, TVN), pp. 247–252.
DAC-2000-YuWK #algorithm #network #order #reduction
Passive model order reduction algorithm based on Chebyshev expansion of impulse response of interconnect networks (QY, JMW, ESK), pp. 520–525.
DATE-1999-WangYK #distributed #estimation
Coupled Noise Estimation for Distributed RC Interconnect Model (JMW, QY, ESK), pp. 664–668.

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