Travelled to:
1 × USA
Collaborated with:
H.R.Ghasemi N.S.Kim
Talks about:
architectur (1) processor (1) heterogen (1) perform (1) voltag (1) size (1) high (1) chip (1) cell (1) cach (1)
Person: Stark C. Draper
DBLP: Draper:Stark_C=
Contributed to:
Wrote 1 papers:
- HPCA-2011-GhasemiDK #architecture #using
- Low-voltage on-chip cache architecture using heterogeneous cell sizes for high-performance processors (HRG, SCD, NSK), pp. 38–49.