Travelled to:
2 × USA
Collaborated with:
N.S.Kim S.C.Draper A.A.Sinkar M.J.Schulte
Talks about:
processor (2) voltag (2) power (2) architectur (1) heterogen (1) constrain (1) deliveri (1) support (1) perform (1) effect (1)
Person: Hamid Reza Ghasemi
DBLP: Ghasemi:Hamid_Reza
Contributed to:
Wrote 2 papers:
- DAC-2012-GhasemiSSK #effectiveness #power management
- Cost-effective power delivery to support per-core voltage domains for power-constrained processors (HRG, AAS, MJS, NSK), pp. 56–61.
- HPCA-2011-GhasemiDK #architecture #using
- Low-voltage on-chip cache architecture using heterogeneous cell sizes for high-performance processors (HRG, SCD, NSK), pp. 38–49.