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Travelled to:
1 × France
Collaborated with:
K.A.Vissers J.Noguera
Talks about:
processor (1) synthesi (1) interfac (1) applic (1) level (1) fpgas (1) build (1) tool (1) time (1) real (1)

Person: Stephen Neuendorffer

DBLP DBLP: Neuendorffer:Stephen

Contributed to:

DATE 20112011

Wrote 1 papers:

DATE-2011-VissersNN #interface #realtime #synthesis #tool support #using
Building real-time HDTV applications in FPGAs using processors, AXI interfaces and high level synthesis tools (KAV, SN, JN), pp. 848–850.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.