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Travelled to:
2 × USA
Collaborated with:
M.Kamon Y.Massoud T.Bustami J.White
Talks about:
interconnect (2) techniqu (1) convert (1) packag (1) layout (1) induct (1) model (1) minim (1) self (1) chip (1)

Person: Steve S. Majors

DBLP DBLP: Majors:Steve_S=

Contributed to:

DAC 19981998
DAC 19961996

Wrote 2 papers:

DAC-1998-MassoudMBW #layout
Layout Techniques for Minimizing On-Chip Interconnect Self Inductance (YM, SSM, TB, JW), pp. 566–571.
DAC-1996-KamonM #modelling
Package and Interconnect Modeling of the HFA3624, a 2.4GHz RF to IF Converter (MK, SSM), pp. 2–7.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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