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Travelled to:
1 × France
1 × USA
Collaborated with:
L.Peh A.P.Chandrakasan C.O.Chen T.Krishna M.Qazi S.Subramanian B.K.Daya A.Chandrakasan
Talks about:
no (3) mesh (2) chip (2) soi (2) reconfigur (1) prototyp (1) approach (1) theoret (1) within (1) signal (1)

Person: Sunghyun Park

DBLP DBLP: Park:Sunghyun

Contributed to:

DATE 20132013
DAC 20122012

Wrote 3 papers:

DATE-2013-ChenPKSCP #configuration management #named
SMART: a single-cycle reconfigurable NoC for SoC applications (CHOC, SP, TK, SS, APC, LSP), pp. 338–343.
DATE-2013-ParkQPC #embedded #logic #self
40.4fJ/bit/mm low-swing on-chip signaling with self-resetting logic repeaters embedded within a mesh NoC in 45nm SOI CMOS (SP, MQ, LSP, APC), pp. 1637–1642.
DAC-2012-ParkKCDCP #prototype
Approaching the theoretical limits of a mesh NoC with a 16-node chip prototype in 45nm SOI (SP, TK, CHOC, BKD, AC, LSP), pp. 398–405.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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