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Travelled to:
3 × USA
Collaborated with:
D.Sylvester D.Blaauw Y.Chang S.Shah S.Rochel
Talks about:
effici (3) base (3) analysi (2) smart (2) carlo (2) mont (2) increment (1) statist (1) resourc (1) process (1)

Person: Vineeth Veetil

DBLP DBLP: Veetil:Vineeth

Contributed to:

DAC 20102010
DAC 20092009
DAC 20082008

Wrote 3 papers:

DAC-2010-VeetilCSB #monte carlo #performance #resource management
Efficient smart monte carlo based SSTA on graphics processing units with improved resource utilization (VV, YHC, DS, DB), pp. 793–798.
DAC-2009-VeetilSBSR #analysis #dependence #performance
Efficient smart sampling based full-chip leakage analysis for intra-die variation considering state dependence (VV, DS, DB, SS, SR), pp. 154–159.
DAC-2008-VeetilSB #analysis #incremental #monte carlo #performance #statistics
Efficient Monte Carlo based incremental statistical timing analysis (VV, DS, DB), pp. 676–681.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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