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Travelled to:
2 × USA
Collaborated with:
H.Meyr S.Pees A.Hoffmann L.M.Guerra J.Fitzner D.Talukdar C.Schläger B.Tabbara
Talks about:
model (2) accur (2) cycl (2) dsp (2) architectur (1) programm (1) descript (1) languag (1) machin (1) integr (1)

Person: Vojin Zivojnovic

DBLP DBLP: Zivojnovic:Vojin

Contributed to:

DAC 19991999
DAC 19961996

Wrote 3 papers:

DAC-1999-GuerraFTSTZ #integration #modelling
Cycle and Phase Accurate DSP Modeling and Integration for HW/SW Co-Verification (LMG, JF, DT, CS, BT, VZ), pp. 964–969.
DAC-1999-PeesHZM #architecture #modelling #named #programmable
LISA — Machine Description Language for Cycle-Accurate Models of Programmable DSP Architectures (SP, AH, VZ, HM), pp. 933–938.
Compiled HW/SW Co-Simulation (VZ, HM), pp. 690–695.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.