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Travelled to:
1 × USA
Collaborated with:
M.J.Ciesielski C.Yu D.Liu A.Rossi
Talks about:
function (1) arithmet (1) extract (1) circuit (1) verif (1) level (1) gate (1)

Person: Walter Brown

DBLP DBLP: Brown:Walter

Contributed to:

DAC 20152015

Wrote 1 papers:

DAC-2015-CiesielskiYBLR #verification
Verification of gate-level arithmetic circuits by function extraction (MJC, CY, WB, DL, AR), p. 6.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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