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Travelled to:
2 × France
6 × USA
Collaborated with:
Y.Cai C.Cheng E.S.Kuh J.Huang S.X.Tan Y.Ma S.Dong J.Gu X.Wang J.Relles J.Fan N.Mi T.Xue H.Li Z.Qi L.Wu S.Liu G.Chen T.T.Jing L.He T.Zhang R.Dutta Y.Lu C.C.N.Sze Q.Zhou L.Huang J.Hu S.Chen
Talks about:
algorithm (3) global (3) effici (3) block (3) rout (3) base (3) driven (2) shape (2) optim (2) model (2)

Person: Xianlong Hong

DBLP DBLP: Hong:Xianlong

Contributed to:

DATE 20092009
DAC 20082008
DATE 20072007
DAC 20052005
DAC 20032003
DAC 20012001
DAC 19931993
DAC 19921992

Wrote 10 papers:

DATE-2009-WangCTHR #modelling #optimisation #performance #polynomial #using
An efficient decoupling capacitance optimization using piecewise polynomial models (XW, YC, SXDT, XH, JR), pp. 1190–1195.
DAC-2008-LiuCJHZDH
Topological routing to maximize routability for package substrate (SL, GC, TTJ, LH, TZ, RD, XH), pp. 566–569.
DATE-2007-FanMTCH #correlation #order #reduction #statistics
Statistical model order reduction for interconnect circuits considering spatial correlations (JF, NM, SXDT, YC, XH), pp. 1508–1513.
DAC-2005-LiQTWCH #approach #clustering #performance
Partitioning-based approach to fast on-chip decap budgeting and minimization (HL, ZQ, SXDT, LW, YC, XH), pp. 170–175.
DAC-2005-LuSHZCHH #navigation #network
Navigating registers in placement for clock network minimization (YL, CCNS, XH, QZ, YC, LH, JH), pp. 176–181.
DAC-2003-MaHDCCCG #analysis #optimisation
Dynamic global buffer planning optimization based on detail block locating and congestion analysis (YM, XH, SD, SC, YC, CKC, JG), pp. 806–811.
DAC-2001-MaHDCCG #constraints
Floorplanning with Abutment Constraints and L-Shaped/T-Shaped Blocks based on Corner Block List (YM, XH, SD, YC, CKC, JG), pp. 770–775.
DAC-1993-HongXKCH #algorithm
Performance-Driven Steiner Tree Algorithm for Global Routing (XH, TX, ESK, CKC, JH), pp. 177–181.
DAC-1993-HuangHCK #algorithm #performance
An Efficient Timing-Driven Global Routing Algorithm (JH, XH, CKC, ESK), pp. 596–600.
DAC-1992-HongHCK #algorithm #named #performance
FARM: An Efficient Feed-Through Pin Assignment Algorithm (XH, JH, CKC, ESK), pp. 530–535.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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