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Used together with:
resist (3)
logic (3)
power (2)
design (2)
improv (2)

Stem dpa$ (all stems)

6 papers:

DACDAC-2011-CevreroRSBIL #library #logic #power management #standard
Power-gated MOS current mode logic (PG-MCML): a power aware DPA-resistant standard cell library (AC, FR, MS, SB, PI, YL), pp. 1014–1019.
DATEDATE-2010-IzumiISO #multi
Improved countermeasure against Address-bit DPA for ECC scalar multiplication (MI, JI, KS, KO), pp. 981–984.
DATEDATE-2009-LomneMTRSC #evaluation #logic #robust
Evaluation on FPGA of triple rail logic robustness against DPA and DEMA (VL, PM, LT, MR, RS, NC), pp. 634–639.
DATEDATE-2007-LinFYL #design #encryption #hardware
Overcoming glitches and dissipation timing skews in design of DPA-resistant cryptographic hardware (KJL, SCF, SHY, CCL), pp. 1265–1270.
DATEDATE-2005-BouesseRDG #formal method
DPA on Quasi Delay Insensitive Asynchronous Circuits: Formalization and Improvement (GFB, MR, SD, FG), pp. 424–429.
DATEDATE-v1-2004-TiriV #design #implementation #logic
A Logic Level Design Methodology for a Secure DPA Resistant ASIC or FPGA Implementation (KT, IV), pp. 246–251.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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