An Adaptive Timing-Driven Layout for High Speed VLSI
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Suphachai Sutanthavibul, Eugene Shragowitz
An Adaptive Timing-Driven Layout for High Speed VLSI
DAC, 1990.

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@inproceedings{DAC-1990-SutanthavibulS,
	author        = "Suphachai Sutanthavibul and Eugene Shragowitz",
	booktitle     = "{Proceedings of the 27th Design Automation Conference}",
	doi           = "10.1145/123186.123233",
	isbn          = "0-89791-363-9",
	pages         = "90--95",
	publisher     = "{IEEE Computer Society Press}",
	title         = "{An Adaptive Timing-Driven Layout for High Speed VLSI}",
	year          = 1990,
}

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