Optimal FPGA module placement with temporal precedence constraints
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Sándor P. Fekete, Ekkehard Köhler, Jürgen Teich
Optimal FPGA module placement with temporal precedence constraints
DATE, 2001.

DATE 2001
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@inproceedings{DATE-2001-FeketeKT,
	author        = "Sándor P. Fekete and Ekkehard Köhler and Jürgen Teich",
	booktitle     = "{Proceedings of the Sixth Conference on Design, Automation and Test in Europe}",
	doi           = "10.1145/367072.367842",
	isbn          = "0-7695-0993-2",
	pages         = "658--667",
	publisher     = "{ACM}",
	title         = "{Optimal FPGA module placement with temporal precedence constraints}",
	year          = 2001,
}

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