An asynchronous architecture for digital signal processors
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M. R. Karthikeyan, Soumitra Kumar Nandy
An asynchronous architecture for digital signal processors
DATE, 1997.

EDTC 1997
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@inproceedings{EDTC-1997-KarthikeyanN,
	author        = "M. R. Karthikeyan and Soumitra Kumar Nandy",
	booktitle     = "{Proceedings of the Second European Design and Test Conference}",
	doi           = "10.1109/EDTC.1997.582428",
	pages         = "615",
	publisher     = "{IEEE}",
	title         = "{An asynchronous architecture for digital signal processors}",
	year          = 1997,
}

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