VCEGAR: Verilog CounterExample Guided Abstraction Refinement
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Himanshu Jain, Daniel Kröning, Natasha Sharygina, Edmund M. Clarke
VCEGAR: Verilog CounterExample Guided Abstraction Refinement
TACAS, 2007.

TACAS 2007
Full names Links ISxN
	author        = "Himanshu Jain and Daniel Kröning and Natasha Sharygina and Edmund M. Clarke",
	booktitle     = "{Proceedings of the 13th International Conference on Tools and Algorithms for the Construction and Analysis of Systems}",
	doi           = "10.1007/978-3-540-71209-1_45",
	isbn          = "978-3-540-71208-4",
	pages         = "583--586",
	publisher     = "{Springer International Publishing}",
	series        = "{Lecture Notes in Computer Science}",
	title         = "{VCEGAR: Verilog CounterExample Guided Abstraction Refinement}",
	volume        = 4424,
	year          = 2007,


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