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Travelled to:
1 × USA
Collaborated with:
R.Malladi G.Serrero
Talks about:
interconnect (1) rectangular (1) placement (1) channel (1) automat (1) block (1)

Person: André Verdillon

DBLP DBLP: Verdillon:Andr=eacute=

Contributed to:

DAC 19811981

Wrote 1 papers:

DAC-1981-MalladiSV #automation
Automatic placement of rectangular blocks with the interconnection channels (RM, GS, AV), pp. 419–425.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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