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Travelled to:
1 × USA
Collaborated with:
J.R.Armstrong
Talks about:
function (1) simul (1) model (1) fault (1) devic (1) vlsi (1)

Person: Anil K. Gupta

DBLP DBLP: Gupta:Anil_K=

Contributed to:

DAC 19851985

Wrote 1 papers:

DAC-1985-GuptaA #fault #functional #modelling #simulation
Functional fault modeling and simulation for VLSI devices (AKG, JRA), pp. 720–726.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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