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Travelled to:
1 × USA
Collaborated with:
W.Chen S.Kundu
Talks about:
raphson (1) current (1) circuit (1) newton (1) method (1) leakag (1) impact (1) effect (1) scale (1) estim (1)

Person: Ashesh Rastogi

DBLP DBLP: Rastogi:Ashesh

Contributed to:

DAC 20072007

Wrote 1 papers:

DAC-2007-RastogiCK #on the
On Estimating Impact of Loading Effect on Leakage Current in Sub-65nm Scaled CMOS Circuits Based on Newton-Raphson Method (AR, WC, SK), pp. 712–715.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.