BibSLEIGH — Proceedings of the 44th Design Automation Conference

Proceedings of the 44th Design Automation Conference
DAC, 2007.

SYS

@proceedings{DAC-2007,
	acmid         = "1278480",
	address       = "San Diego, California, USA",
	publisher     = "{IEEE}",
	title         = "{Proceedings of the 44th Design Automation Conference}",
	year          = 2007,
}

Contents (201 items)

DAC-2007-Burns #design: Designing a New Automotive DNA (LDB).
DAC-2007-Kwon #challenge #industrial: Perspective of the Future Semiconductor Industry: Challenges and Solutions (OHK).
DAC-2007-Rabaey #design #legacy: Design without Borders — A Tribute to the Legacy of A. Richard Newton (JMR).
DAC-2007-IrvineL #hardware #question: Trusted Hardware: Can It Be Trustworthy? (CEI, KNL), pp. 1–4.
DAC-2007-Trimberger #design: Trusted Design in FPGAs (ST), pp. 5–8.
DAC-2007-SuhD #authentication #generative #physics: Physical Unclonable Functions for Device Authentication and Secret Key Generation (GES, SD), pp. 9–14.
DAC-2007-Tiri: Side-Channel Attack Pitfalls (KT), pp. 15–20.
DAC-2007-BacchiniSCKGHY #roadmap: Megatrends and EDA 2017 (FB, GS, JAC, KK, AJdG, FCH, KY), pp. 21–22.
DAC-2007-TibboelRKA #design #functional: System-Level Design Flow Based on a Functional Reference for HW and SW (WHT, VR, MK, DA), pp. 23–28.
DAC-2007-PatelS #design #modelling #validation: Model-driven Validation of SystemC Designs (HDP, SKS), pp. 29–34.
DAC-2007-BhattacharyaRS #process: Language Extensions to SystemC: Process Control Constructs (BB, JR, SS), pp. 35–38.
DAC-2007-HuangHPBGLyCCJ #case study #design: Simulink-Based MPSoC Design Flow: Case Study of Motion-JPEG and H.264 (KH, SIH, KP, LBdB, XG, LL, XY, SIC, LC, AAJ), pp. 39–42.
DAC-2007-YuL #design: Design of Rotary Clock Based Circuits (ZY, XL), pp. 43–48.
DAC-2007-Ozdal #clustering: Escape Routing For Dense Pin Clusters In Integrated Circuits (MMO), pp. 49–54.
DAC-2007-ChoXPP #named: TROY: Track Router with Yield-driven Wire Planning (MC, HX, RP, DZP), pp. 55–58.
DAC-2007-PanC #algorithm #named: IPR: An Integrated Placement and Routing Algorithm (MP, CCNC), pp. 59–62.
DAC-2007-PaulaH #effectiveness #simulation: An Effective Guidance Strategy for Abstraction-Guided Simulation (FMdP, AJH), pp. 63–68.
DAC-2007-BhatiaGTMM #equivalence #multi #performance #validation: Leveraging Semi-Formal and Sequential Equivalence Techniques for Multimedia SOC Performance Validation (LB, JG, PT, RSM, SHM), pp. 69–74.
DAC-2007-LongS #verification: Synthesizing SVA Local Variables for Formal Verification (JL, AS), pp. 75–80.
DAC-2007-ChiouJCC #algorithm #fine-grained #power management: Fine-Grained Sleep Transistor Sizing Algorithm for Leakage Power Minimization (DSC, DCJ, YTC, SCC), pp. 81–86.
DAC-2007-GuSK #modelling #random #statistics: Width-dependent Statistical Leakage Modeling for Random Dopant Induced Threshold Voltage Shift (JG, SSS, CHK), pp. 87–92.
DAC-2007-HeloueAN #correlation #estimation #modelling: Modeling and Estimation of Full-Chip Leakage Current Considering Within-Die Correlation (KRH, NA, FNN), pp. 93–98.
DAC-2007-LiY #analysis #power management #statistics: Statistical Analysis of Full-Chip Leakage Power Considering Junction Tunneling Leakage (TL, ZY), pp. 99–102.
DAC-2007-SeomunKS: Skewed Flip-Flop Transformation for Minimizing Leakage in Sequential Circuits (JS, JK, YS), pp. 103–106.
DAC-2007-VenkataramanPGOMYNZ: Making Manufacturing Work For You (SV, RP, SG, AO, RM, GY, WN, YZ), pp. 107–108.
DAC-2007-OgrasMCM #clustering: Voltage-Frequency Island Partitioning for GALS-based Networks-on-Chip (ÜYO, RM, PC, DM), pp. 110–115.
DAC-2007-MarescauxC: Introducing the SuperGT Network-on-Chip; SuperGT QoS: more than just GT (TM, HC), pp. 116–121.
DAC-2007-LuLJ #network: Layered Switching for Networks on Chip (ZL, ML, AJ), pp. 122–127.
DAC-2007-LeungT #energy #synthesis: Energy-Aware Synthesis of Networks-on-Chip Implemented with Voltage Islands (LFL, CYT), pp. 128–131.
DAC-2007-ShachamBC #network #power management: The Case for Low-Power Photonic Networks on Chip (AS, KB, LPC), pp. 132–135.
DAC-2007-SrivastavaR #equation: Interdependent Latch Setup/Hold Time Characterization via Euler-Newton Curve Tracing on State-Transition Equations (SS, JSR), pp. 136–141.
DAC-2007-WangLR #automation #megamodelling #named #parametricity #variability: PV-PPV: Parameter Variability Aware, Automatically Extracted, Nonlinear Time-Shifted Oscillator Macromodels (ZW, XL, JSR), pp. 142–147.
DAC-2007-RamalingamSNOP #analysis #composition #modelling #using: Accurate Waveform Modeling using Singular Value Decomposition with Applications to Timing Analysis (AR, AKS, SRN, MO, DZP), pp. 148–153.
DAC-2007-YangG #simulation: Simulating Improbable Events (SY, MRG), pp. 154–157.
DAC-2007-YanTLM #higher-order #named #reduction: SBPOR: Second-Order Balanced Truncation for Passive Order Reduction of RLC Circuits (BY, SXDT, PL, BM), pp. 158–161.
DAC-2007-ZhaoPRFMCSY: On-Chip Decoupling Capacitance and P/G Wire Co-optimization for Dynamic Noise (MZ, RP, BR, YF, TM, SC, SS, SY), pp. 162–167.
DAC-2007-AmelifardP #delivery #network #power management: Optimal Selection of Voltage Regulator Modules in a Power Delivery Network (BA, MP), pp. 168–173.
DAC-2007-GandikotaCBSB #analysis #set: Top-k Aggressors Sets in Delay Noise Analysis (RG, KC, DB, DS, MRB), pp. 174–179.
DAC-2007-JiangHS #design #difference: A New Twisted Differential Line Structure in Global Bus Design (ZJ, SH, WS), pp. 180–183.
DAC-2007-RoyMC #nondeterminism: Effects of Coupling Capacitance and Inductance on Delay Uncertainty and Clock Skew (AR, NHM, MHC), pp. 184–187.
DAC-2007-Vardi #verification: Formal Techniques for SystemC Verification; Position Paper (MYV), pp. 188–192.
DAC-2007-MathurK #design #modelling #verification: Design for Verification in System-level Models and RTL (AM, VK), pp. 193–198.
DAC-2007-KasuyaT #design #verification: Verification Methodologies in a TLM-to-RTL Design Flow (AK, TT), pp. 199–204.
DAC-2007-KoelblBP #equivalence #memory management #modelling: Memory Modeling in ESL-RTL Equivalence Checking (AK, JRB, CP), pp. 205–209.
DAC-2007-KamhiMMNWKMKC #design #power management #question #validation: Early Power-Aware Design & Validation: Myth or Reality? (GK, SM, SBM, WN, YCW, JK, EM, SVK, SC), pp. 210–211.
DAC-2007-ChangHK #design #performance: Endurance Enhancement of Flash-Memory Storage, Systems: An Efficient Static Wear Leveling Design (YHC, JWH, TWK), pp. 212–217.
DAC-2007-KumarSCKS #embedded #memory management: A System For Coarse Grained Memory Protection In Tiny Embedded Processors (RK, AS, AC, EK, MBS), pp. 218–223.
DAC-2007-KocKEO #embedded #memory management #multi #using: Reducing Off-Chip Memory Access Costs Using Data Recomputation in Embedded Chip Multi-processors (HK, MTK, EE, ÖÖ), pp. 224–229.
DAC-2007-XueOK #parallel: A Memory-Conscious Code Parallelization Scheme (LX, ÖÖ, MTK), pp. 230–233.
DAC-2007-Gordon-RossV #configuration management #self: A Self-Tuning Configurable Cache (AGR, FV), pp. 234–237.
DAC-2007-BurnsKMBTD #analysis #comparative #design #statistics: Comparative Analysis of Conventional and Statistical Design Techniques (SMB, MK, NM, KAB, JT, VD), pp. 238–243.
DAC-2007-FengLZ #analysis #higher-order #parametricity #performance #reduction #statistics #using: Fast Second-Order Statistical Static Timing Analysis Using Parameter Dimension Reduction (ZF, PL, YZ), pp. 244–249.
DAC-2007-ChengXH #analysis #statistics: Non-Linear Statistical Static Timing Analysis for Non-Gaussian Variation Sources (LC, JX, LH), pp. 250–255.
DAC-2007-SingheeR #performance #statistics: Beyond Low-Order Statistical Response Surfaces: Latent Variable Regression for Efficient, Highly Nonlinear Fitting (AS, RAR), pp. 256–261.
DAC-2007-SolomatnikovFQSKAWHH #generative #multi: Chip Multi-Processor Generator (AS, AF, WQ, OS, KK, ZA, MW, RH, MH), pp. 262–263.
DAC-2007-EdwardsL #precise: The Case for the Precision Timed (PRET) Machine (SAE, EAL), pp. 264–265.
DAC-2007-BogdanM #behaviour: Quantum-Like Effects in Network-on-Chip Buffers Behavior (PB, RM), pp. 266–267.
DAC-2007-KoushanfarP #encryption #security: CAD-based Security, Cryptography, and Digital Rights Management (FK, MP), pp. 268–269.
DAC-2007-GuptaKKSS: Line-End Shortening is Not Always a Failure (PG, ABK, YK, SS, DS), pp. 270–271.
DAC-2007-Levitan #graph #random: You Can Get There From Here: Connectivity of Random Graphs on Grids (SPL), pp. 272–273.
DAC-2007-LiKBR #flexibility #performance #power management: High Performance and Low Power Electronics on Flexible Substrate (JL, KK, AB, KR), pp. 274–275.
DAC-2007-LiuONG #configuration management #design #logic #novel: Novel CNTFET-based Reconfigurable Logic Gate Design (JL, IO, DN, FG), pp. 276–277.
DAC-2007-DavareZNPKS #distributed #optimisation #realtime: Period Optimization for Hard Real-time Distributed Automotive Systems (AD, QZ, MDN, CP, SK, ALSV), pp. 278–283.
DAC-2007-HagiescuBCSGR #analysis #network #performance: Performance Analysis of FlexRay-based ECU Networks (AH, UDB, SC, PS, PVVG, SR), pp. 284–289.
DAC-2007-PimentelP #analysis: Experimental Jitter Analysis in a FlexCAN Based Drive-by-Wire Automotive Application (JRP, JP), pp. 290–293.
DAC-2007-GuHY #distributed #embedded #model checking #optimisation: Optimization of Static Task and Bus Access Schedules for Time-Triggered Distributed Embedded Systems with Model-Checking (ZG, XH, MY), pp. 294–299.
DAC-2007-ZhangSJ #architecture #configuration management #design #hybrid #named #optimisation: NanoMap: An Integrated Design Optimization Flow for a Hybrid Nanotube/CMOS Dynamically Reconfigurable Architecture (WZ, LS, NKJ), pp. 300–305.
DAC-2007-DadgourB #analysis #design #hybrid #power management: Design and Analysis of Hybrid NEMS-CMOS Circuits for Ultra Low-Power Applications (HFD, KB), pp. 306–311.
DAC-2007-ZhuGSDK #architecture #power management #towards #using: Towards An Ultra-Low-Power Architecture Using Single-Electron Tunneling Transistors (CZ, Z(G, LS, RPD, RGK), pp. 312–317.
DAC-2007-ChengCW #named #power management: GlitchMap: An FPGA Technology Mapper for Low Power Considering Glitches (LC, DC, MDFW), pp. 318–323.
DAC-2007-CzajkowskiB #using: Using Negative Edge Triggered FFs to Reduce Glitching Power in FPGA Circuits (TSC, SDB), pp. 324–329.
DAC-2007-GolshanB: Single-Event-Upset (SEU) Awareness in FPGA Routing (SG, EB), pp. 330–333.
DAC-2007-BriskVIP #performance: Enhancing FPGA Performance for Arithmetic Circuits (PB, AKV, PI, HPA), pp. 334–337.
DAC-2007-ChenZ #performance #process: Fast Min-Cost Buffer Insertion under Process Variations (RC, HZ), pp. 338–343.
DAC-2007-TaylorP #combinator #design #logic #optimisation #physics: Exact Combinatorial Optimization Methods for Physical Design of Regular Logic Bricks (BT, LTP), pp. 344–349.
DAC-2007-RizzoM #concurrent: Concurrent Wire Spreading, Widening, and Filling (OR, HM), pp. 350–353.
DAC-2007-TsaiZT #design #layout #modelling: Modeling Litho-Constrained Design Layout (MCT, DZ, ZT), pp. 354–357.
DAC-2007-KangKIAR #estimation #metric #online #reliability #using: Characterization and Estimation of Circuit Reliability Degradation under NBTI using On-Line IDDQ Measurement (KK, KK, AEI, MAA, KR), pp. 358–363.
DAC-2007-WangYBVVLC #performance: The Impact of NBTI on the Performance of Combinational and Sequential Circuits (WW, SY, SB, RV, SBKV, FL, YC), pp. 364–369.
DAC-2007-KumarKS #synthesis: NBTI-Aware Synthesis of Digital Circuits (SVK, CHK, SSS), pp. 370–375.
DAC-2007-Hiller: There Is More Than Moore In Automotive ... (HH), p. 376.
DAC-2007-GoldgeisserCD #hardware #modelling: Modeling Safe Operating Area in Hardware Description Languages (LBG, EC, ZD), pp. 377–382.
DAC-2007-Ferguson: Autonomous Automobiles: Developing Cars That Drive Themselves (DF), p. 383.
DAC-2007-WangBA #correlation #data mining #mining #perspective: Design-Silicon Timing Correlation A Data Mining Perspective (LCW, PB, MSA), pp. 384–389.
DAC-2007-KillpackKC #feedback #metric: Silicon Speedpath Measurement and Feedback into EDA flows (KK, CVK, EC), pp. 390–395.
DAC-2007-AgarwalN #process: Characterizing Process Variation in Nanometer CMOS (KA, SRN), pp. 396–399.
DAC-2007-Nagata #design #metric: On-Chip Measurements Complementary to Design Flow for Integrity in SoCs (MN), pp. 400–403.
DAC-2007-VermaBI #composition #heuristic: Progressive Decomposition: A Heuristic to Structure Arithmetic Circuits (AKV, PB, PI), pp. 404–409.
DAC-2007-CollinsC #optimisation #throughput: Topology-Based Optimization of Maximal Sustainable Throughput in a Latency-Insensitive System (RLC, LPC), pp. 410–415.
DAC-2007-CortadellaK #evaluation: Synchronous Elastic Circuits with Early Evaluation and Token Counterflow (JC, MK), pp. 416–419.
DAC-2007-AksoyCFM #metric #optimisation #using: Optimization of Area in Digital FIR Filters using Gate-Level Metrics (LA, EACdC, PFF, JCM), pp. 420–423.
DAC-2007-VytyazLLMMM #parametricity: Parameter Finding Methods for Oscillators with a Specified Oscillation Frequency (IV, DCL, SL, AM, UKM, KM), pp. 424–429.
DAC-2007-ChanZ #modelling: Modeling Simultaneous Switching Noise-Induced Jitter for System-on-Chip Phase-Locked Loops (HHYC, ZZ), pp. 430–435.
DAC-2007-DongL #performance #simulation #using: Accelerating Harmonic Balance Simulation Using Efficient Parallelizable Hierarchical Preconditioning (WD, PL), pp. 436–439.
DAC-2007-KimJH #estimation #monte carlo #performance: Fast, Non-Monte-Carlo Estimation of Transient Performance Variation Due to Device Mismatch (JK, KDJ, MAH), pp. 440–443.
DAC-2007-BacchiniGMKDMGN #named: TLM: Crossing Over From Buzz To Adoption (FB, DDG, LMC, HK, JD, TM, JG, RSN), pp. 444–445.
DAC-2007-SmithCHRSW #difference #industrial #named: Electronics: The New Differential in the Automotive Industry (NS, AC, CH, WCR, ALSV, FW), p. 446.
DAC-2007-ChenYCHL #algorithm #design #metaprogramming #named: MP-trees: A Packing-Based Macro Placement Algorithm for Mixed-Size Designs (TCC, PHY, YWC, FJH, DL), pp. 447–452.
DAC-2007-ViswanathanNAVRC #named #polynomial: RQL: Global Placement via Relaxed Quadratic Spreading and Linearization (NV, GJN, CJA, PV, HR, CCNC), pp. 453–458.
DAC-2007-WuW #detection #incremental: Improving Voltage Assignment by Outlier Detection and Incremental Placement (HW, MDFW), pp. 459–464.
DAC-2007-LinL #novel #symmetry: Analog Placement Based on Novel Symmetry-Island Formulation (MPHL, SCL), pp. 465–470.
DAC-2007-KirnerS #analysis #execution #modelling #worst-case: Modeling the Function Cache for Worst-Case Execution Time Analysis (RK, MS), pp. 471–476.
DAC-2007-KaoHL #embedded #integration #multi: An Embedded Multi-resolution AMBA Trace Analyzer for Microprocessor-based SoC Integration (CFK, IJH, CHL), pp. 477–482.
DAC-2007-MaoW #embedded #hardware: Hardware Support for Secure Processing in Embedded Systems (SM, TW), pp. 483–488.
DAC-2007-AmbroseRP #analysis #injection #named #random: RIJID: Random Code Injection to Mask Power Analysis based Side Channel Attacks (JAA, RGR, SP), pp. 489–492.
DAC-2007-PiyachonL #pattern matching #performance #state machine: Compact State Machines for High Performance Pattern Matching (PP, YL), pp. 493–496.
DAC-2007-LiuS #predict #process #scalability #statistics: Confidence Scalable Post-Silicon Statistical Delay Prediction under Process Variations (QL, SSS), pp. 497–502.
DAC-2007-ChoKKPT #co-evolution #convergence #design #framework #statistics: Statistical Framework for Technology-Model-Product Co-Design and Convergence (CC, DDK, JK, JOP, RT), pp. 503–508.
DAC-2007-ChenL #statistics #testing #using: Extraction of Statistical Timing Profiles Using Test Data (YYC, JJL), pp. 509–514.
DAC-2007-SundaresanM #analysis #distributed: An Analysis of Timing Violations Due to Spatially Distributed Thermal Effects in Global Wires (KS, NRM), pp. 515–520.
DAC-2007-ImhofZWML #reduction #testing: Scan Test Planning for Power Reduction (MEI, CGZ, HJW, NM, JL), pp. 521–526.
DAC-2007-WenMSKOS #effectiveness #reduction #testing: Critical-Path-Aware X-Filling for Effective IR-Drop Reduction in At-Speed Scan Testing (XW, KM, TS, SK, YO, KKS), pp. 527–532.
DAC-2007-AhmedTJ #design #fault #generative: Transition Delay Fault Test Pattern Generation Considering Supply Voltage Noise in a SOC Design (NA, MT, VJ), pp. 533–538.
DAC-2007-MrugalskiRCT #power management #testing: New Test Data Decompressor for Low Power Applications (GM, JR, DC, JT), pp. 539–544.
DAC-2007-RacuHER #integration: Automotive Software Integration (RR, AH, RE, KR), pp. 545–550.
DAC-2007-Natale #analysis #challenge #platform: Virtual Platforms and Timing Analysis: Status, Challenges and Future Directions (MDN), pp. 551–555.
DAC-2007-RajnakK #architecture #design #distributed #implementation: Computer-aided Architecture Design & Optimized Implementation of Distributed Automotive EE Systems (AR, AK), pp. 556–561.
DAC-2007-BernsteinACEGHIKMPY #3d #challenge #design: Interconnects in the Third Dimension: Design Challenges for 3D ICs (KB, PA, JC, PGE, DG, WH, MI, SJK, JM, RP, AMY), pp. 562–567.
DAC-2007-NaeemiSM #modelling #multi #optimisation #performance: Performance Modeling and Optimization for Single- and Multi-Wall Carbon Nanotube Interconnects (AN, RS, JDM), pp. 568–573.
DAC-2007-Roychowdhury: Micro-Photonic Interconnects: Characteristics, Possibilities and Limitations (JSR), pp. 574–575.
DAC-2007-Scheffer: CAD Implications of New Interconnect Technologies (LS), pp. 576–581.
DAC-2007-HanS #algorithm #named #performance #preprocessor: Alembic: An Efficient Algorithm for CNF Preprocessing (HH, FS), pp. 582–587.
DAC-2007-DengBWYZ #named #performance #satisfiability #using: EHSAT: An Efficient RTL Satisfiability Solver Using an Extended DPLL Procedure (SD, JB, WW, XY, YZ), pp. 588–593.
DAC-2007-ShachamY #on the fly: On-The-Fly Resolve Trace Minimization (OS, KY), pp. 594–599.
DAC-2007-ChatterjeeMBK #equivalence #on the #proving: On Resolution Proofs for Combinational Equivalence (SC, AM, RKB, AK), pp. 600–605.
DAC-2007-FangHC #algorithm #design #integer #linear #programming: An Integer Linear Programming Based Routing Algorithm for Flip-Chip Design (JWF, CHH, YWC), pp. 606–611.
DAC-2007-BharathESUY #performance #simulation: Computationally Efficient Power Integrity Simulation for System-on-Package Applications (KB, EE, MS, KU, TY), pp. 612–617.
DAC-2007-YuCH #co-evolution #design: Off-chip Decoupling Capacitor Allocation for Chip Package Co-Design (HY, CC, LH), pp. 618–621.
DAC-2007-PuttaswamyL #3d #scalability: Scalability of 3D-Integrated Arithmetic Units in High-Performance Microprocessors (KP, GHL), pp. 622–625.
DAC-2007-GoplenS #3d: Placement of 3D ICs with Thermal and Interlayer Via Considerations (BG, SSS), pp. 626–631.
DAC-2007-SarnoHLLLRCLY #manycore #named #question: Corezilla: Build and Tame the Multicore Beast? (LS, WmWH, CL, ML, JRL, JR, GC, CL, TY), pp. 632–633.
DAC-2007-Weiss #biology: Synthetic biology: from bacteria to stem cells (RW), pp. 634–635.
DAC-2007-You: Engineering synthetic killer circuits in bacteria (LY), pp. 636–637.
DAC-2007-Tabor #parallel #programming: Programming Living Cells to Function as Massively Parallel Computers (JJT), pp. 638–639.
DAC-2007-FettBR: Synthesizing Stochasticity in Biochemical Systems (BF, JB, MDR), pp. 640–645.
DAC-2007-BonnyH #performance: Instruction Splitting for Efficient Code Compression (TB, JH), pp. 646–651.
DAC-2007-ChuKCCG #embedded #multi #programming #thread: An Embedded Coherent-Multithreading Multimedia Processor and Its Programming Model (JCC, WCK, SHC, TFC, JIG), pp. 652–657.
DAC-2007-WiggersBS #data flow #graph #performance: Efficient Computation of Buffer Capacities for Cyclo-Static Dataflow Graphs (MW, MB, GJMS), pp. 658–663.
DAC-2007-XianLL #energy #execution #multi #nondeterminism #realtime #scheduling: Energy-Aware Scheduling for Real-Time Multiprocessor Systems with Uncertain Task Execution Time (CX, YHL, ZL), pp. 664–669.
DAC-2007-BhojwaniM #concurrent #online #protocol #robust: A Robust Protocol for Concurrent On-Line Test (COLT) of NoC-based Systems-on-a-Chip (PB, RNM), pp. 670–675.
DAC-2007-XuZC #architecture #fault #optimisation: SOC Test Architecture Optimization for Signal Integrity Faults on Core-External Interconnects (QX, YZ, KC), pp. 676–681.
DAC-2007-IwataYF: A DFT Method for Time Expansion Model at Register Transfer Level (HI, TY, HF), pp. 682–687.
DAC-2007-GoswamiTKR #constraints #exception #generative #testing: Test Generation in the Presence of Timing Exceptions and Constraints (DG, KHT, MK, JR), pp. 688–693.
DAC-2007-SeokHSB #analysis #design #optimisation: Analysis and Optimization of Sleep Modes in Subthreshold Circuit Design (MS, SH, DS, DB), pp. 694–699.
DAC-2007-HansonSSB #scalability: Nanometer Device Scaling in Subthreshold Circuits (SH, MS, DS, DB), pp. 700–705.
DAC-2007-HariziHOB #analysis #modelling #performance: Efficient Modeling Techniques for Dynamic Voltage Drop Analysis (HH, RH, MO, EB), pp. 706–711.
DAC-2007-RastogiCK #on the: On Estimating Impact of Loading Effect on Leakage Current in Sub-65nm Scaled CMOS Circuits Based on Newton-Raphson Method (AR, WC, SK), pp. 712–715.
DAC-2007-JooCSC #energy #memory management #multi: Energy-Aware Data Compression for Multi-Level Cell (MLC) Flash Memory (YJ, YC, DS, NC), pp. 716–719.
DAC-2007-BobrekPT #modelling #resource management: Shared Resource Access Attributes for High-Level Contention Models (AB, JMP, DET), pp. 720–725.
DAC-2007-KumarMCTH #approach #estimation #multi #performance #probability: A Probabilistic Approach to Model Resource Contention for Performance Estimation of Multi-featured Media Devices (AK, BM, HC, BDT, YH), pp. 726–731.
DAC-2007-HallschmidS #automation #energy #modelling #using: Automatic Cache Tuning for Energy-Efficiency using Local Regression Modeling (PH, RS), pp. 732–737.
DAC-2007-RamanCOD #multi: Reducing Data-Memory Footprint of Multimedia Applications by Delay Redistribution (BR, SC, WTO, SD), pp. 738–743.
DAC-2007-BacchiniHFRLTPZ #question #verification: Verification Coverage: When is Enough, Enough? (FB, AJH, TF, RR, DL, MT, AP, AZ), pp. 744–745.
DAC-2007-Borkar #perspective: Thousand Core ChipsA Technology Perspective (SB), pp. 746–749.
DAC-2007-AgarwalL #manycore: The KILL Rule for Multicore (AA, ML), pp. 750–753.
DAC-2007-HwuRUKGSKBMTNLFP #modelling #parallel #programming: Implicitly Parallel Programming Models for Thousand-Core Microprocessors (WmWH, SR, SZU, JHK, IG, SSS, REK, SSB, AM, SCT, NN, SSL, MIF, SJP), pp. 754–759.
DAC-2007-Darringer #automation #challenge #design #manycore: Multi-Core Design Automation Challenges (JAD), pp. 760–764.
DAC-2007-LimKK #architecture #communication #distributed #synthesis: Interconnect and Communication Synthesis for Distributed Register-File Microarchitecture (KHL, YK, TK), pp. 765–770.
DAC-2007-BanerjeeBDN #architecture #configuration management #resource management #scheduling: Selective Band width and Resource Management in Scheduling for Dynamically Reconfigurable Architectures (SB, EB, ND, JN), pp. 771–776.
DAC-2007-StuijkBGC #data flow #graph #multi #resource management: Multiprocessor Resource Allocation for Throughput-Constrained Synchronous Dataflow Graphs (SS, TB, MG, HC), pp. 777–782.
DAC-2007-VenkataramaniBCG #analysis: Global Critical Path: A Tool for System-Level Timing Analysis (GV, MB, TC, SCG), pp. 783–786.
DAC-2007-ChandraiahD #flexibility #generative #parallel #specification: Designer-Controlled Generation of Parallel and Flexible Heterogeneous MPSoC Specification (PC, RD), pp. 787–790.
DAC-2007-BauerSKH #framework #named #platform #set: RISPP: Rotating Instruction Set Processing Platform (LB, MS, SK, JH), pp. 791–796.
DAC-2007-MorganT #encoding #energy #reduction: ASIP Instruction Encoding for Energy and Area Reduction (PM, RT), pp. 797–800.
DAC-2007-OstlerC #algorithm #approximate #architecture #concurrent #multi #network #thread: Approximation Algorithm for Data Mapping on Block Multi-threaded Network Processor Architectures (CO, KSC), pp. 801–804.
DAC-2007-YuYBY #clustering #network #recursion: Program Mapping onto Network Processors by Recursive Bipartitioning and Refining (JY, JY, LNB, JY), pp. 805–810.
DAC-2007-SheeP #design #multi #pipes and filters: Design Methodology for Pipelined Heterogeneous Multiprocessor System (SLS, SP), pp. 811–816.
DAC-2007-Liu #correlation #design #framework #modelling: A General Framework for Spatial Correlation Modeling in VLSI Design (FL), pp. 817–822.
DAC-2007-SinghalBSLNC #analysis #modelling #simulation: Modeling and Analysis of Non-Rectangular Gate for Post-Lithography Circuit Simulation (RS, AB, ARS, FL, SRN, YC), pp. 823–828.
DAC-2007-YuDFL #analysis #framework #nondeterminism #process #statistics: A Framework for Accounting for Process Model Uncertainty in Statistical Static Timing Analysis (GY, WD, ZF, PL), pp. 829–834.
DAC-2007-ZhouLS #bound #embedded #hybrid #multi #performance #using: Fast Capacitance Extraction in Multilayer, Conformal and Embedded Dielectric using Hybrid Boundary Element Method (NYZ, ZL, WS), pp. 835–840.
DAC-2007-AgostaBPS #approach #canonical: A Unified Approach to Canonical Form-based Boolean Matching (GA, FB, GP, DS), pp. 841–846.
DAC-2007-HuKH #design: Gate Sizing For Cell Library-Based Designs (SH, MK, JH), pp. 847–852.
DAC-2007-YeZL #optimisation #performance #power management #statistics #using: Statistical Leakage Power Minimization Using Fast Equi-Slack Shell Based Optimization (XY, YZ, PL), pp. 853–858.
DAC-2007-MangHH #distributed #effectiveness #physics #synthesis: Techniques for Effective Distributed Physical Synthesis (FYCM, WH, PHH), pp. 859–864.
DAC-2007-ZhangGS #architecture #named #optimisation: SODA: Sensitivity Based Optimization of Disk Architecture (YZ, SG, MRS), pp. 865–870.
DAC-2007-ZhuoCLC #hybrid #power management: Dynamic Power Management with Hybrid Power Sources (JZ, CC, KL, NC), pp. 871–876.
DAC-2007-ChandraLRD #power management: System-on-Chip Power Management Considering Leakage Power Variations (SC, KL, AR, SD), pp. 877–882.
DAC-2007-GhodratLR #analysis #estimation #hybrid #using: Accelerating System-on-Chip Power Analysis Using Hybrid Power Estimation (MAG, KL, AR), pp. 883–886.
DAC-2007-LiuLC #algorithm #approximate #multi #optimisation #using: A Provably Good Approximation Algorithm for Power Optimization Using Multiple Supply Voltages (HYL, WPL, YWC), pp. 887–890.
DAC-2007-CoptyJKV #approach #generative #novel #testing: Intelligent Interleaving of Scenarios: A Novel Approach to System Level Test Generation (SC, IJ, YK, MV), pp. 891–895.
DAC-2007-YangHH #automation #behaviour #design #verification: Automatic Verification of External Interrupt Behaviors for Microprocessor Design (FCY, WKH, IJH), pp. 896–901.
DAC-2007-AdirAFJP #architecture #framework #validation: A Framework for the Validation of Processor Architecture Compliance (AA, SA, LF, IJ, OP), pp. 902–905.
DAC-2007-PetlinS #functional #multi #verification: Functional Verification of SiCortex Multiprocessor System-on-a-Chip (OP, WS), pp. 906–909.
DAC-2007-ChengCW07a #named #synthesis: DDBDD: Delay-Driven BDD Synthesis for FPGAs (LC, DC, MDFW), pp. 910–915.
DAC-2007-LucasHE #library #named #realtime: FlexWAFE — A High-end Real-Time Stream Processing Library for FPGAs (AdCL, SH, RE), pp. 916–921.
DAC-2007-ZhouTLW #how #logic: How Much Can Logic Perturbation Help from Netlist to Final Routing for FPGAs (CLZ, WCT, WHL, YLW), pp. 922–927.
DAC-2007-LiP #correlation #multi #parametricity #performance: Efficient Parametric Yield Extraction for Multiple Correlated Non-Normal Performance Distributions of Analog/RF Circuits (XL, LTP), pp. 928–933.
DAC-2007-KangKR #design #power management #using: Variation Resilient Low-Power Circuit Design Methodology using On-Chip Phase Locked Loop (KK, KK, KR), pp. 934–939.
DAC-2007-WangLP #design #megamodelling: Parameterized Macromodeling for Analog System-Level Design Exploration (JW, XL, LTP), pp. 940–943.
DAC-2007-McConaghyPGS #multi: Simultaneous Multi-Topology Multi-Objective Sizing Across Thousands of Analog Circuit Topologies (TM, PP, GGEG, MS), pp. 944–947.
DAC-2007-XuC #synthesis: Integrated Droplet Routing in the Synthesis of Microfluidic Biochips (TX, KC), pp. 948–953.
DAC-2007-MalyLM #design: OPC-Free and Minimally Irregular IC Design Style (WM, YWL, MMS), pp. 954–957.
DAC-2007-PatilDWM #automation #design: Automated Design of Misaligned-Carbon-Nanotube-Immune Circuits (NP, JD, HSPW, SM), pp. 958–961.
DAC-2007-MaslovFM #empirical #interactive #optimisation #physics #quantum: Quantum Circuit Placement: Optimizing Qubit-to-qubit Interactions through Mapping Quantum Circuits into a Physical Experiment (DM, SMF, MM), pp. 962–965.
DAC-2007-HuangTKC #analysis #case study #flexibility #reliability: Reliability Analysis for Flexible Electronics: Case Study of Integrated a-Si: H TFT Scan Driver (TCH, HYT, CPK, KTC), pp. 966–969.
DAC-2007-HuangCCN: Clock Period Minimization with Minimum Delay Insertion (SHH, CHC, CMC, YTN), pp. 970–975.
DAC-2007-SuWCM #design #optimisation #performance: An Efficient Mechanism for Performance Optimization of Variable-Latency Designs (YSS, DCW, SCC, MMS), pp. 976–981.
DAC-2007-AndrikosLPS: A Fully-Automated Desynchronization Flow for Synchronous Circuits (NA, LL, DP, CPS), pp. 982–985.
DAC-2007-ChelceaVG #self: Self-Resetting Latches for Asynchronous Micro-Pipelines (TC, GV, SCG), pp. 986–989.
DAC-2007-SarnoWELGSLW #ll: IP Exchange: I’ll Show You Mine if You Show Me Yours (LS, RW, SKE, LL, JG, GS, SL, DW), pp. 990–991.

Proceedings of the 44th Design Automation ConferenceDAC, 2007.

Contents (201 items)

Proceedings of the 44th Design Automation Conference
DAC, 2007.