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Travelled to:
1 × United Kingdom
Collaborated with:
D.M.Tullsen M.DeVuyst Mohammadkazem Taram Sriskanda Shamasunder H.Shacham
Talks about:
heterogen (2) execut (2) isa (2) multiprocessor (1) microcod (1) program (1) context (1) specul (1) sensit (1) migrat (1)

Person: Ashish Venkat

DBLP DBLP: Venkat:Ashish

Contributed to:

ASPLOS 20122012
ASPLOS 20162016
ASPLOS 20192019

Wrote 3 papers:

ASPLOS-2012-DeVuystVT #execution #migration #multi
Execution migration in a heterogeneous-ISA chip multiprocessor (MD, AV, DMT), pp. 261–272.
ASPLOS-2016-VenkatSST #named
HIPStR: Heterogeneous-ISA Program State Relocation (AV, SS, HS, DMT), pp. 727–741.
ASPLOS-2019-TaramVT #execution
Context-Sensitive Fencing: Securing Speculative Execution via Microcode Customization (MT, AV, DMT), pp. 395–410.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.