Iris Bahar, Maurice Herlihy, Emmett Witchel, Alvin R. Lebeck
Proceedings of the Twenty-Fourth International Conference on Architectural Support for Programming Languages and Operating Systems
ASPLOS, 2019.
@proceedings{ASPLOS-2019,
doi = "10.1145/3297858",
editor = "Iris Bahar and Maurice Herlihy and Emmett Witchel and Alvin R. Lebeck",
isbn = "978-1-4503-6240-5",
publisher = "{ACM}",
title = "{Proceedings of the Twenty-Fourth International Conference on Architectural Support for Programming Languages and Operating Systems}",
year = 2019,
}
Contents (76 items)
- ASPLOS-2019-Liskov #manycore #named #programming
- Keynote: Multicore Programming (BL), p. 1.
- ASPLOS-2019-Svore #named #quantum
- Keynote: Developing our Quantum Future (KMS), p. 2.
- ASPLOS-2019-GanZCSRKBHRJHPH #benchmark #metric #open source
- An Open-Source Benchmark Suite for Microservices and Their Hardware-Software Implications for Cloud & Edge Systems (YG0, YZ, DC, AS, PR, NK, AB, JH, BR, BJ, KH, MP, YH, BC, CC, FW, CL, SW, LZ, ME, RL, ZL, JP, CD), pp. 3–18.
- ASPLOS-2019-GanZHCHPD #big data #complexity #debugging #named #performance
- Seer: Leveraging Big Data to Navigate the Complexity of Performance Debugging in Cloud Microservices (YG0, YZ, KH, DC, YH, MP, CD), pp. 19–33.
- ASPLOS-2019-DaglisSF #named
- RPCValet: NI-Driven Tail-Aware Balancing of µs-Scale RPCs (AD, MS, BF), pp. 35–48.
- ASPLOS-2019-0015ARZMGY #framework #memory management
- A Framework for Memory Oversubscription Management in Graphics Processing Units (CL0, RA, CJR, YZ, OM, YG0, JY0), pp. 49–63.
- ASPLOS-2019-PhothilimthanaE #data flow #gpu #kernel #synthesis
- Swizzle Inventor: Data Movement Synthesis for GPU Kernels (PMP, ASE, AW0, AJ, BH, HB, SJK, VG, ET, RB), pp. 65–78.
- ASPLOS-2019-JiangSF0 #approach #parallel #scalability
- Scalable Processing of Contemporary Semi-Structured Data on Commodity Parallel Processors - A Compilation-based Approach (LJ, XS, UF, ZZ0), pp. 79–92.
- ASPLOS-2019-ZhangZWLFZS #framework #performance #scalability
- Fast and Scalable VMM Live Upgrade in Large Cloud Infrastructure (XZ, XZ, ZW0, QL0, JF, YZ, YS), pp. 93–105.
- ASPLOS-2019-ChenDM #clustering #interactive #multi #named
- PARTIES: QoS-Aware Resource Partitioning for Multiple Interactive Services (SC, CD, JFM), pp. 107–120.
- ASPLOS-2019-ShenSSBDRW #named #performance
- X-Containers: Breaking Down Barriers to Improve Performance and Isolation of Cloud-Native Containers (ZS, ZS, GES, EB, CD, RvR, HW), pp. 121–135.
- ASPLOS-2019-PellauerSCCHVKF #composition #distributed #named #performance
- Buffets: An Efficient and Composable Storage Idiom for Explicit Decoupled Data Orchestration (MP, YSS, JC, NCC, KH, RV, SWK, CWF, JSE), pp. 137–151.
- ASPLOS-2019-ZhengOZSYC #framework #named #performance #pipes and filters
- HiWayLib: A Software Framework for Enabling High Performance Communications for Heterogeneous Pipeline Computations (ZZ, CO, JZ, XS, YY, WC), pp. 153–166.
- ASPLOS-2019-MiaoJPML #hybrid #memory management #named
- StreamBox-HBM: Stream Analytics on High Bandwidth Hybrid Memory (HM, MJ, GP, KSM, FXL), pp. 167–181.
- ASPLOS-2019-WillseySTVNPBNJ #framework #named #platform
- Puddle: A Dynamic, Error-Correcting, Full-Stack Microfluidics Platform (MW, APS, CT, PV, BHN, MP, CB, SN, SJ, KS, LC), pp. 183–197.
- ASPLOS-2019-GobieskiLB #embedded
- Intelligence Beyond the Edge: Inference on Intermittent Embedded Systems (GG, BL, NB), pp. 199–213.
- ASPLOS-2019-TzimpragosMVSS #classification #energy
- Boosted Race Trees for Low Energy Classification (GT, AM, DV, DBS, TS), pp. 215–228.
- ASPLOS-2019-Tsai0 #memory management
- Compress Objects, Not Cache Lines: An Object-Based Compressed Memory Hierarchy (PAT, DS0), pp. 229–242.
- ASPLOS-2019-LiPWTZDC #statistics
- Beating OPT with Statistical Clairvoyance and Variable Size Caching (PL, CP, WW, BT, JZ, CD, JC), pp. 243–256.
- ASPLOS-2019-LustigSG #analysis #consistency #formal method #memory management
- A Formal Analysis of the NVIDIA PTX Memory Consistency Model (DL, SS, OG), pp. 257–270.
- ASPLOS-2019-SchkufzaWR #compilation #experience #programming
- Just-In-Time Compilation for Verilog: A New Technique for Improving the FPGA Programming Experience (ES, MW, CJR), pp. 271–286.
- ASPLOS-2019-BaiLTH #automation #detection #fault #kernel #linux #named
- DCNS: Automated Detection Of Conservative Non-Sleep Defects in the Linux Kernel (JJB, JL, WT, SMH0), pp. 287–299.
- ASPLOS-2019-HuLH #mobile #resource management
- A Case for Lease-Based, Utilitarian Resource Management on Mobile Devices (YH, SL, PH), pp. 301–315.
- ASPLOS-2019-Lagar-CavillaAS #memory management
- Software-Defined Far Memory in Warehouse-Scale Computers (HALC, JA, SS, NA, RB, SB, JC, AC, ND, JS, GT, KAY, YZ, PR), pp. 317–330.
- ASPLOS-2019-YanLNB #memory management
- Nimble Page Management for Tiered Memory Systems (ZY, DL, DWN, AB), pp. 331–345.
- ASPLOS-2019-PanwarBG #fine-grained #named #performance
- HawkEye: Efficient Fine-grained OS Support for Huge Pages (AP, SB, KG), pp. 347–360.
- ASPLOS-2019-ZhangGFABNOA #architecture #security
- Architectural Support for Containment-based Security (HZ, SG, JF, SA, SRB, NPN, TO, DIA), pp. 361–377.
- ASPLOS-2019-DavisWRNMBCCFGJ #c #named #pointer #runtime
- CheriABI: Enforcing Valid Pointer Provenance and Minimizing Pointer Privilege in the POSIX C Run-time Environment (BD, RNMW, AR, PGN, SWM, JB, DC, JC, NWF, KG, AJ, BL, ATM, JEM, AM, ETN, RMN, MR, PS, SDS, JW), pp. 379–393.
- ASPLOS-2019-TaramVT #execution
- Context-Sensitive Fencing: Securing Speculative Execution via Microcode Customization (MT, AV, DMT), pp. 395–410.
- ASPLOS-2019-0001WZKK #flexibility #framework #memory management #named #performance #persistent #source code #testing
- PMTest: A Fast and Flexible Testing Framework for Persistent Memory Programs (SL0, YW, JZ, AK, SMK), pp. 411–425.
- ASPLOS-2019-XuKMS #memory management #performance #persistent
- Finding and Fixing Performance Pathologies in Persistent Memory Software Stacks (JX0, JK, AM, SS), pp. 427–439.
- ASPLOS-2019-CohenAAL
- Fine-Grain Checkpointing with In-Cache-Line Logging (NC, DTA, HA, JRL), pp. 441–454.
- ASPLOS-2019-JangTKSH #execution
- Heterogeneous Isolated Execution for Commodity GPUs (IJ, AT, TK, SS, JH), pp. 455–468.
- ASPLOS-2019-GallagherBCAYAH #architecture #named
- Morpheus: A Vulnerability-Tolerant Secure Architecture Based on Ensembles of Moving Target Defenses with Churn (MG, LB, SC, ZBA, SFY, MTA, AH, ZX, BK, VB, SM, MT, TMA), pp. 469–484.
- ASPLOS-2019-RouhaniCK #framework #named #network
- DeepSigns: An End-to-End Watermarking Framework for Ownership Protection of Deep Neural Networks (BDR, HC, FK), pp. 485–497.
- ASPLOS-2019-ChoOPJL #learning #named
- FA3C: FPGA-Accelerated Deep Reinforcement Learning (HC, PO, JP, WJ, JL), pp. 499–513.
- ASPLOS-2019-BanerjeeKI #algorithm #markov #modelling #monte carlo #probability
- AcMC 2 : Accelerating Markov Chain Monte Carlo Algorithms for Probabilistic Models (SSB, ZTK, RKI), pp. 515–528.
- ASPLOS-2019-Pakin #quantum
- Targeting Classical Code to a Quantum Annealer (SP), pp. 529–543.
- ASPLOS-2019-BhatKBG #named #program transformation
- ProbeGuard: Mitigating Probing Attacks Through Reactive Program Transformations (KB, EvdK, HB, CG), pp. 545–558.
- ASPLOS-2019-OsterlundKOBBG #detection #execution #kernel #multi #named
- kMVX: Detecting Kernel Information Leaks with Multi-variant Execution (SÖ, KK, PO, AB, HB, CG), pp. 559–572.
- ASPLOS-2019-PinaA0C #execution #multi #named
- MVEDSUA: Higher Availability Dynamic Software Updates via Multi-Version Execution (LP, AA, MH0, CC), pp. 573–585.
- ASPLOS-2019-XuV0 #graph #named #predict
- PnP: Pruning and Prediction for Point-To-Point Iterative Graph Analytics (CX, KV, RG0), pp. 587–600.
- ASPLOS-2019-ZhangL0HLG #graph #multi #named #performance
- DiGraph: An Efficient Path-based Iterative Directed Graph Processing System on Multiple GPUs (YZ0, XL, HJ0, BH, HL, LG0), pp. 601–614.
- ASPLOS-2019-DathathriGHP #distributed #graph #named
- Phoenix: A Substrate for Resilient Distributed Graph Analytics (RD, GG, LH, KP), pp. 615–630.
- ASPLOS-2019-ZhangLJ #memory management #named #safety
- BOGO: Buy Spatial Memory Safety, Get Temporal Memory Safety (Almost) Free (TZ, DL, CJ), pp. 631–644.
- ASPLOS-2019-WuSCL #pointer #using
- Protecting Page Tables from RowHammer Attacks using Monotonic Pointers in DRAM True-Cells (XCW, TS, FTC, YL), pp. 645–657.
- ASPLOS-2019-NagarajanSBT #named
- ρ: Relaxed Hierarchical ORAM (CN, AS, RB, MT), pp. 659–671.
- ASPLOS-2019-0002R #architecture #latency #throughput
- uops.info: Characterizing Latency, Throughput, and Port Usage of Instructions on Intel Microarchitectures (AA0, JR), pp. 673–686.
- ASPLOS-2019-KondguliH #hardware #named #performance #smt #thread #using
- Bootstrapping: Using SMT Hardware to Improve Single-Thread Performance (SK, MH), pp. 687–700.
- ASPLOS-2019-EsfedenKJWA #named
- CORF: Coalescing Operand Register File for GPUs (HAE, FK, HJ, DW0, NBAG), pp. 701–714.
- ASPLOS-2019-AnkitHCNFWFHS0M #machine learning #named #programmable
- PUMA: A Programmable Ultra-efficient Memristor-based Accelerator for Machine Learning Inference (AA, IEH, SRC, GN, MF, RSW, PF, WmWH, JPS, KR0, DSM), pp. 715–731.
- ASPLOS-2019-JiZXLWHZX #architecture #configuration management #named #stack
- FPSA: A Full System Stack Solution for Reconfigurable ReRAM-based NN Accelerator Architecture (YJ0, YZ, XX, SL, PW0, XH0, YZ, YX0), pp. 733–747.
- ASPLOS-2019-LascorzJSPMSNSM #approach #hardware #named #network
- Bit-Tactical: A Software/Hardware Approach to Exploiting Value and Bit Sparsity in Neural Networks (ADL, PJ, DMS, ZP, MM, SS, MN, KS, AM), pp. 749–763.
- ASPLOS-2019-TangZQC #architecture #message passing #named #performance
- pLock: A Fast Lock for Architectures with Explicit Inter-core Message Passing (XT, JZ, XQ, WC), pp. 765–778.
- ASPLOS-2019-KimMKRM #multi #named #scalability
- MV-RLU: Scaling Read-Log-Update with Multi-Versioning (JK, AM, SK, MKR, CM), pp. 779–792.
- ASPLOS-2019-WangFL #fine-grained #performance
- Fast Fine-Grained Global Synchronization on GPUs (KW, DF, CL), pp. 793–806.
- ASPLOS-2019-GaoYPHK #data flow #named #scalability
- TANGRAM: Optimized Coarse-Grained Dataflow for Scalable NN Accelerators (MG, XY, JP, MH, CK), pp. 807–820.
- ASPLOS-2019-KungMZ #array #implementation #network #optimisation #performance
- Packing Sparse Convolutional Neural Networks for Efficient Systolic Array Implementations: Column Combining Under Joint Optimization (HTK, BM, SQZ), pp. 821–834.
- ASPLOS-2019-JinH #memory management #named #network #optimisation
- Split-CNN: Splitting Window-based Operations in Convolutional Neural Networks for Memory System Optimization (TJ, SH), pp. 835–847.
- ASPLOS-2019-FernandoFAMT #approximate #manycore #named
- Replica: A Wireless Manycore for Communication-Intensive and Approximate Data (VF, AF, SA, SM, JT), pp. 849–863.
- ASPLOS-2019-TuLSZ #comprehension #concurrent #debugging
- Understanding Real-World Concurrency Bugs in Go (TT, XL, LS, YZ), pp. 865–878.
- ASPLOS-2019-MerrifieldRDE #lazy evaluation #multi #performance #thread
- Lazy Determinism for Faster Deterministic Multithreading (TM, SR, JD, JE), pp. 879–891.
- ASPLOS-2019-LuoLZQ #distributed #named
- Hop: Heterogeneity-aware Decentralized Training (QL, JL, YZ, XQ), pp. 893–907.
- ASPLOS-2019-SivathanuCSZ #learning #named #predict
- Astra: Exploiting Predictability to Optimize Deep Learning (MS, TC, SSS, LZ), pp. 909–923.
- ASPLOS-2019-RenZYLXQLW #co-evolution #design #framework #multi #named #using
- ADMM-NN: An Algorithm-Hardware Co-Design Framework of DNNs Using Alternating Direction Methods of Multipliers (AR, TZ, SY, JL, WX, XQ, XL, YW), pp. 925–938.
- ASPLOS-2019-ChungKIAL #named
- LightStore: Software-defined Network-attached Key-value Drives (CC, JK, JI, A, SL), pp. 939–953.
- ASPLOS-2019-LiuKJKD #3d
- SOML Read: Rethinking the Read Operation Granularity of 3D NAND SSDs (CYL, JBK, MJ, MTK, CRD), pp. 955–969.
- ASPLOS-2019-AbulilaMQHKXH #named
- FlatFlash: Exploiting the Byte-Accessibility of SSDs within a Unified Memory-Storage Hierarchy (AHMOA, VSM, ZQ, JH0, NSK, JX, WMWH), pp. 971–985.
- ASPLOS-2019-TannuQ #policy #quantum #variability
- Not All Qubits Are Created Equal: A Case for Variability-Aware Policies for NISQ-Era Quantum Computers (SST, MKQ), pp. 987–999.
- ASPLOS-2019-LiDX #problem #quantum
- Tackling the Qubit Mapping Problem for NISQ-Era Quantum Devices (GL, YD, YX0), pp. 1001–1014.
- ASPLOS-2019-MuraliBJCM #adaptation #compilation #quantum
- Noise-Adaptive Compiler Mappings for Noisy Intermediate-Scale Quantum Computers (PM, JMB, AJA, FTC, MM), pp. 1015–1029.
- ASPLOS-2019-ShiLGRSHC #compilation #quantum
- Optimized Compilation of Aggregated Instructions for Realistic Quantum Computers (YS, NL, PG, ZR, DIS, HH, FTC), pp. 1031–1044.
- ASPLOS-2019-LehmannP #framework #named
- Wasabi: A Framework for Dynamically Analyzing WebAssembly (DL0, MP), pp. 1045–1058.
- ASPLOS-2019-DangwalCMS #behaviour
- Safer Program Behavior Sharing Through Trace Wringing (DD, WC, JM, TS), pp. 1059–1072.
- ASPLOS-2019-CasiasATSW #debugging #pattern matching
- Debugging Support for Pattern-Matching Languages and Accelerators (MC, KA, TTI, KS, WW), pp. 1073–1086.
- ASPLOS-2019-MahmoudVAMMFA #adaptation #fault #hardware #named #testing
- Minotaur: Adapting Software Testing Techniques for Hardware Errors (AM, RV, KA, SM, DM, CWF, SVA), pp. 1087–1103.