BibSLEIGH
BibSLEIGH corpus
BibSLEIGH tags
BibSLEIGH bundles
BibSLEIGH people
EDIT!
CC-BY
Open Knowledge
XHTML 1.0 W3C Rec
CSS 2.1 W3C CanRec
email twitter
Travelled to:
1 × USA
Collaborated with:
N.Ranganathan
Talks about:
interconnect (1) power (1) petri (1) model (1) estim (1) delay (1) gate (1) net (1)

Person: Ashok K. Murugavel

DBLP DBLP: Murugavel:Ashok_K=

Contributed to:

DAC 20022002

Wrote 1 papers:

DAC-2002-MurugavelR #estimation #modelling #petri net
Petri net modeling of gate and interconnect delays for power estimation (AKM, NR), pp. 455–460.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.