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Travelled to:
1 × USA
Collaborated with:
M.P.Lin V.W.Hsiao
Talks about:
capacitor (1) parasit (1) weight (1) detail (1) binari (1) scale (1) charg (1) size (1) rout (1) awar (1)

Person: Chun-Yu Lin

DBLP DBLP: Lin:Chun=Yu

Contributed to:

DAC 20142014

Wrote 1 papers:

DAC-2014-LinHL
Parasitic-aware Sizing and Detailed Routing for Binary-weighted Capacitors in Charge-scaling DAC (MPHL, VWHH, CYL), p. 6.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.