Travelled to:1 × Germany
2 × USA
Collaborated with:R.Ernst P.Axer J.Diemer
Talks about:ethernet (2) perform (2) exploit (2) analysi (2) improv (2) synchron (1) dataflow (1) schedul (1) resourc (1) network (1)
Person: Daniel Thiele
DBLP: Thiele:Daniel
Contributed to:
20152014
2012Wrote 3 papers:
- DAC-2015-ThieleAE #analysis #scheduling
- Improving formal timing analysis of switched ethernet by exploiting FIFO scheduling (DT, PA, RE), p. 6.
- DAC-2014-AxerTED #bound #network #performance
- Exploiting Shaper Context to Improve Performance Bounds of Ethernet AVB Networks (PA, DT, RE, JD), p. 6.
- DATE-2012-ThieleE #analysis #data flow #graph #optimisation #performance
- Optimizing performance analysis for synchronous dataflow graphs with shared resources (DT, RE), pp. 635–640.