BibSLEIGH corpus
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BibSLEIGH people
Open Knowledge
XHTML 1.0 W3C Rec
CSS 2.1 W3C CanRec
email twitter
Travelled to:
1 × Germany
2 × USA
Collaborated with:
R.Ernst P.Axer J.Diemer
Talks about:
ethernet (2) perform (2) exploit (2) analysi (2) improv (2) synchron (1) dataflow (1) schedul (1) resourc (1) network (1)

Person: Daniel Thiele

DBLP DBLP: Thiele:Daniel

Contributed to:

DAC 20152015
DAC 20142014
DATE 20122012

Wrote 3 papers:

DAC-2015-ThieleAE #analysis #scheduling
Improving formal timing analysis of switched ethernet by exploiting FIFO scheduling (DT, PA, RE), p. 6.
DAC-2014-AxerTED #bound #network #performance
Exploiting Shaper Context to Improve Performance Bounds of Ethernet AVB Networks (PA, DT, RE, JD), p. 6.
DATE-2012-ThieleE #analysis #data flow #graph #optimisation #performance
Optimizing performance analysis for synchronous dataflow graphs with shared resources (DT, RE), pp. 635–640.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.