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Travelled to:
1 × USA
Collaborated with:
J.K.Ousterhout G.T.Hamachi R.N.Mayo W.S.Scott
Talks about:
magic (2) increment (1) checker (1) system (1) layout (1) design (1) vlsi (1) rule (1)

Person: George S. Taylor

DBLP DBLP: Taylor:George_S=

Contributed to:

DAC 19841984

Wrote 2 papers:

DAC-1984-OusterhoutHMST #layout #named
Magic: A VLSI layout system (JKO, GTH, RNM, WSS, GST), pp. 152–159.
DAC-1984-TaylorO #incremental
Magic’s incremental design-rule checker (GST, JKO), pp. 160–165.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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