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Travelled to:
1 × Germany
Collaborated with:
M.Castano C.Ciofi D.Mangano
Talks about:
asynchron (1) insensit (1) network (1) solut (1) delay (1) link (1) chip (1) new (1) gal (1)

Person: Giuseppe Campobello

DBLP DBLP: Campobello:Giuseppe

Contributed to:

DATE Designers’ Forum 20062006

Wrote 1 papers:

DATE-DF-2006-CampobelloCCM #network
GALS networks on chip: a new solution for asynchronous delay-insensitive links (GC, MC, CC, DM), pp. 160–165.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.