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Travelled to:
1 × USA
Collaborated with:
G.Farnham R.Reid
Talks about:
system (1) layout (1) plint (1) vlsi (1) chip (1)

Person: Hart Anway

DBLP DBLP: Anway:Hart

Contributed to:

DAC 19851985

Wrote 1 papers:

DAC-1985-AnwayFR #layout
PLINT layout system for VLSI chips (HA, GF, RR), pp. 449–452.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.