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Travelled to:
1 × Germany
Collaborated with:
M.H.Zaki S.Tahar
Talks about:
circuit (1) toward (1) reduct (1) improv (1) analog (1) simul (1) order (1) model (1) use (1)

Person: Henda Aridhi

DBLP DBLP: Aridhi:Henda

Contributed to:

DATE 20122012

Wrote 1 papers:

DATE-2012-AridhiZT #order #reduction #simulation #towards #using
Towards improving simulation of analog circuits using model order reduction (HA, MHZ, ST), pp. 1337–1342.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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