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Travelled to:
1 × USA
2 × France
2 × Germany
Collaborated with:
S.Tahar R.Narayanan O.Lahiouel H.Aridhi G.A.Sammane A.Daghar B.Akbarpour L.C.Paulson
Talks about:
analog (6) circuit (4) use (4) process (2) presenc (2) variat (2) toward (2) signal (2) design (2) verif (2)

Person: Mohamed H. Zaki

DBLP DBLP: Zaki:Mohamed_H=

Contributed to:

DAC 20152015
DATE 20122012
DATE 20112011
DATE 20102010
DATE 20072007

Wrote 6 papers:

DAC-2015-LahiouelZT #smt #towards #using
Towards enhancing analog circuits sizing using SMT-based techniques (OL, MHZ, ST), p. 6.
DATE-2012-AridhiZT #order #reduction #simulation #towards #using
Towards improving simulation of analog circuits using model order reduction (HA, MHZ, ST), pp. 1337–1342.
DATE-2012-NarayananDZT #design #using #verification
Verifying jitter in an analog and mixed signal design using dynamic time warping (RN, AD, MHZ, ST), pp. 1413–1416.
DATE-2011-NarayananZT #correctness #pattern matching #process #using
Ensuring correctness of analog circuits in presence of noise and process variations using pattern matching (RN, MHZ, ST), pp. 1188–1191.
DATE-2010-NarayananAZTP #process #verification
Formal verification of analog circuits in the presence of noise and process variation (RN, BA, MHZ, ST, LCP), pp. 1309–1312.
DATE-2007-Al-SammaneZT #design #verification
A symbolic methodology for the verification of analog and mixed signal designs (GAS, MHZ, ST), pp. 249–254.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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