BibSLEIGH
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Travelled to:
1 × USA
Collaborated with:
U.Jäger
Talks about:
recognit (1) circuit (1) layout (1) inform (1) verif (1) base (1)

Person: I. Ablasser

DBLP DBLP: Ablasser:I=

Contributed to:

DAC 19811981

Wrote 1 papers:

DAC-1981-AblasserJ #layout #recognition #verification
Circuit recognition and verification based on layout information (IA, UJ), pp. 684–689.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.