Travelled to:
1 × USA
Collaborated with:
I.Ablasser
Talks about:
recognit (1) circuit (1) layout (1) inform (1) verif (1) base (1)
Person: U. Jäger
DBLP: J=auml=ger:U=
Contributed to:
Wrote 1 papers:
- DAC-1981-AblasserJ #layout #recognition #verification
- Circuit recognition and verification based on layout information (IA, UJ), pp. 684–689.