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Travelled to:
1 × Switzerland
Collaborated with:
K.Z.Pekmestzi N.Anastasiadis N.K.Moshopoulos
Talks about:
acceler (2) translat (1) peripher (1) multipli (1) hardwar (1) bytecod (1) detect (1) fpgas (1) less (1) java (1)

Person: Isidoros Sideris

DBLP DBLP: Sideris:Isidoros

Contributed to:

SAC 20102010

Wrote 2 papers:

SAC-2010-AnastasiadisSP #detection #multi #performance
A fast multiplier-less edge detection accelerator for FPGAs (NA, IS, KZP), pp. 510–515.
SAC-2010-SiderisMP #hardware #java
A hardware peripheral for Java bytecodes translation acceleration (IS, NKM, KZP), pp. 552–553.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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