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method (10)
direct (8)
altern (8)
verif (6)
design (5)

Stem multipli$ (all stems)

43 papers:

DATEDATE-2015-RustP #approximate #design #multi
Design method for multiplier-less two-variable numeric function approximation (JR, SP), pp. 948–953.
ICMLICML-2015-ZhaoYZL #adaptation #multi #probability
Adaptive Stochastic Alternating Direction Method of Multipliers (PZ, JY, TZ, PL), pp. 69–77.
KDDKDD-2015-KadkhodaieCSB #multi
Accelerated Alternating Direction Method of Multipliers (MK, KC, MS, AB), pp. 497–506.
DACDAC-2014-RoyMIT #multi #performance
Tile Before Multiplication: An Efficient Strategy to Optimize DSP Multiplier for Accelerating Prime Field ECC for NIST Curves (DBR, DM, MI, JT), p. 6.
DATEDATE-2014-LiuHL #approximate #configuration management #fault #multi #power management
A low-power, high-performance approximate multiplier with configurable partial error recovery (CL, JH, FL), pp. 1–4.
ICMLICML-c1-2014-AzadiS #multi #probability #towards
Towards an optimal stochastic alternating direction method of multipliers (SA, SS), pp. 620–628.
ICMLICML-c1-2014-Suzuki #coordination #multi #probability
Stochastic Dual Coordinate Ascent with Alternating Direction Method of Multipliers (TS), pp. 736–744.
ICMLICML-c1-2014-YogatamaS #multi #word
Making the Most of Bag of Words: Sentence Regularization with Alternating Direction Method of Multipliers (DY, NAS), pp. 656–664.
ICMLICML-c1-2014-ZhongK #multi #performance #probability
Fast Stochastic Alternating Direction Method of Multipliers (WZ, JTYK), pp. 46–54.
ASPLOSASPLOS-2014-LuponGMSMSD #float #hardware #multi
Speculative hardware/software co-designed floating-point multiply-add fusion (ML, EG, GM, SS, RM, KS, DRD), pp. 623–638.
ICMLICML-c1-2013-OuyangHTG #multi #probability
Stochastic Alternating Direction Method of Multipliers (HO, NH, LT, AGG), pp. 80–88.
ICMLICML-c1-2013-Suzuki #multi #online
Dual Averaging and Proximal Gradient Descent for Online Alternating Direction Multiplier Method (TS), pp. 392–400.
DATEDATE-2012-LvKE #multi #performance #reduction #verification
Efficient Gröbner basis reductions for formal verification of galois field multipliers (JL, PK, FE), pp. 899–904.
STOCSTOC-2012-Williams #matrix #multi #performance
Multiplying matrices faster than coppersmith-winograd (VVW), pp. 887–898.
ICALPICALP-v2-2011-SchmitzS #bound #multi #recursion
Multiply-Recursive Upper Bounds with Higman’s Lemma (SS, PS), pp. 441–452.
SACSAC-2010-AnastasiadisSP #detection #multi #performance
A fast multiplier-less edge detection accelerator for FPGAs (NA, IS, KZP), pp. 510–515.
PPoPPPPoPP-2010-ChoiSV #modelling #multi
Model-driven autotuning of sparse matrix-vector multiply on GPUs (JC, AS, RWV), pp. 115–126.
DACDAC-2008-BrockmanLKKM #array #design #memory management #multi #programmable #using
Design of a mask-programmable memory/multiplier array using G4-FET technology (JBB, SL, PMK, AK, MMM), pp. 337–338.
DATEDATE-2008-LaiHK #identification #multi #verification
Improving Constant-Coefficient Multiplier Verification by Partial Product Identification (CYL, CYH, KYK), pp. 813–818.
DATEDATE-2008-WangH #multi #synthesis
Structural Synthesis of Four-Quadrant Multiplier Based on Hierarchical Topology (XW, LH), pp. 800–803.
SACSAC-2006-GraillatLL #multi
Improving the compensated Horner scheme with a fused multiply and add (SG, PL, NL), pp. 1323–1327.
DATEDATE-2005-JacobiWPB #automation #multi #verification
Automatic Formal Verification of Fused-Multiply-Add FPUs (CJ, KW, VP, JB), pp. 1298–1303.
DATEDATE-DF-2004-PanatoSWJRB #design #multi #pipes and filters
Design of Very Deep Pipelined Multipliers for FPGAs (AP, SVS, FRW, MOJ, RR, SB), pp. 52–57.
DACDAC-2003-ManeatisKMMS #generative #multi #self
Self-biased high-bandwidth low-jitter 1-to-4096 multiplier clock generator PLL (JGM, JK, IM, JM, MS), pp. 688–690.
DACDAC-2003-SehgalIKC #multi #reduction #using
Test cost reduction for SOCs using virtual TAMs and lagrange multipliers (AS, VI, MDK, KC), pp. 738–743.
DATEDATE-2002-KaivolaN #float #multi #verification
Formal Verification of the Pentium ® 4 Floating-Point Multiplier (RK, NN), pp. 20–27.
DACDAC-2001-KimZP #multi
A True Single-Phase 8-bit Adiabatic Multiplier (SK, CHZ, MCP), pp. 758–763.
DATEDATE-2001-BertoniBF #architecture #encryption #finite #multi #performance
Efficient finite field digital-serial multiplier architecture for cryptography applications (GB, LB, PF), p. 812.
DATEDATE-1999-NoufalN #framework #generative #multi #self
A CAD Framework for Generating Self-Checking 1 Multipliers Based on Residue Codes (IAN, MN), p. 122–?.
DATEDATE-1999-PaschalisKPGZ #architecture #effectiveness #multi #performance
An Effective BIST Architecture for Fast Multiplier Cores (AMP, NK, MP, DG, YZ), pp. 117–121.
RTARTA-1999-Touzet #multi #recursion
A Characterisation of Multiply Recursive Functions with Higman’s Lemma (HT), pp. 163–174.
DATEDATE-1998-NicolaidisD #design #multi #predict
Design of Fault-Secure Parity-Prediction Booth Multipliers (MN, RdOD), pp. 7–14.
SACSAC-1998-WangW #adaptation #multi #optimisation #performance
Efficient and adaptive Lagrange-multiplier methods for continuous nonlinear optimization (TW, BWW), pp. 361–365.
CAVCAV-1996-KapurS #multi #product line #verification
Mechanically Verifying a Family of Multiplier Circuits (DK, MS), pp. 135–146.
CAVCAV-1995-Bryant #multi #verification
Multipliers and Dividers: Insights on Arithmetic Circuits Verification (Extended Abstract) (REB), pp. 1–3.
DATEEDAC-1994-NicolaidisB #array #implementation #multi #performance #self
Efficient Implementations of Self-Checking Multiply and Divide Arrays (MN, HB), pp. 574–579.
DACDAC-1993-GhoshNSP #architecture #multi #synthesis
Architectural Synthesis of Performance-Driven Multipliers with Accumulator Interleaving (DG, SKN, PS, KP), pp. 303–307.
CAVCAV-1993-KurshanL #multi #verification
Verification of a Multiplier: 64 Bits and Beyond (RPK, LL), pp. 166–179.
DACDAC-1991-Burch #multi #using #verification
Using BDDs to Verify Multipliers (JRB), pp. 408–412.
DACDAC-1984-ChuS #generative #independence #multi
A technology independent MOS multiplier generator (KcC, RS), pp. 90–97.
ICALPICALP-1984-MehlhornP #integer #multi
Area-Time Optimal VLSI Integer Multiplier with Minimum Computation Time (KM, FPP), pp. 347–357.
STOCSTOC-1974-Pratt #matrix #multi #power of
The Power of Negative Thinking in Multiplying Boolean Matrices (VRP), pp. 80–83.
DACDAC-1971-Beretvas #data transformation #multi
Multiply indexed data management (TB), pp. 358–366.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.