BibSLEIGH corpus
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Open Knowledge
XHTML 1.0 W3C Rec
CSS 2.1 W3C CanRec
email twitter
Travelled to:
2 × USA
Collaborated with:
T.Kim K.Chung P.R.Panda
Talks about:
algorithm (1) synthesi (1) schedul (1) voltag (1) profil (1) memori (1) integr (1) assign (1) applic (1) optim (1)

Person: Jaewon Seo

DBLP DBLP: Seo:Jaewon

Contributed to:

DAC 20042004
DAC 20022002

Wrote 2 papers:

DAC-2004-SeoKC #realtime #scheduling
Profile-based optimal intra-task voltage scheduling for hard real-time applications (JS, TK, KSC), pp. 87–92.
DAC-2002-SeoKP #algorithm #memory management #synthesis
An integrated algorithm for memory allocation and assignment in high-level synthesis (JS, TK, PRP), pp. 608–611.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.