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Travelled to:
1 × USA
Collaborated with:
P.Narendran
Talks about:
process (1) formal (1) verif (1) sobel (1) imag (1) chip (1)

Person: Jonathan Stillman

DBLP DBLP: Stillman:Jonathan

Contributed to:

DAC 19881988

Wrote 1 papers:

DAC-1988-NarendranS #image #verification
Formal Verification of the Sobel Image Processing Chip (PN, JS), pp. 211–217.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.