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Travelled to:
1 × Canada
1 × Israel
Collaborated with:
W.A.H.Jr.
Talks about:
verif (2) microprocessor (1) processor (1) approach (1) pipelin (1) specul (1) precis (1) execut (1) trace (1) exept (1)

Person: Jun Sawada

DBLP DBLP: Sawada:Jun

Contributed to:

CAV 19981998
CAV 19971997

Wrote 2 papers:

CAV-1998-SawadaH #execution #precise #verification
Processor Verification with Precise Exeptions and Speculative Execution (JS, WAHJ), pp. 135–146.
CAV-1997-SawadaH #approach #pipes and filters #verification
Trace Table Based Approach for Pipeline Microprocessor Verification (JS, WAHJ), pp. 364–375.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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