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Travelled to:
1 × France
1 × Italy
Collaborated with:
G.Cabodi P.Camurati L.Garcia S.Nocco S.Quer
Talks about:
verif (2) constraint (1) explicit (1) hardwar (1) exploit (1) hidden (1) speed (1) model (1) check (1) base (1)

Person: Marco Murciano

DBLP DBLP: Murciano:Marco

Contributed to:

DATE 20092009
SFM 20062006

Wrote 2 papers:

DATE-2009-CabodiCGMNQ #constraints #model checking #verification
Speeding up model checking by exploiting explicit and hidden verification constraints (GC, PC, LG, MM, SN, SQ), pp. 1686–1691.
SFM-2006-CabodiM #hardware #verification
BDD-Based Hardware Verification (GC, MM), pp. 78–107.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.