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Travelled to:
1 × USA
Collaborated with:
M.Katevenis
Talks about:
rearrang (1) instruct (1) penalti (1) memori (1) branch (1) width (1) reduc (1) doubl (1)

Person: Nestoras Tzartzanis

DBLP DBLP: Tzartzanis:Nestoras

Contributed to:

ASPLOS 19911991

Wrote 1 papers:

ASPLOS-1991-KatevenisT #branch #memory management
Reducing the Branch Penalty by Rearranging Instructions in Double-Width Memory (MK, NT), pp. 15–27.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.