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Travelled to:
1 × France
4 × USA
Collaborated with:
E.P.Markatos N.Tzartzanis D.N.Serpanos E.Spyridakis P.Tendulkar V.Papaefstathiou G.Nikiforos S.G.Kavadias D.S.Nikolopoulos A.Vladimirescu D.Weiss Z.Bronstein A.Kifir K.Danuwidjaja K.C.Ng N.Jain S.Lass
Talks about:
hardwar (2) atm (2) interconnect (1) telegrapho (1) workstat (1) rearrang (1) parallel (1) instruct (1) explicit (1) communic (1)

Person: Manolis Katevenis

DBLP DBLP: Katevenis:Manolis

Contributed to:

DATE 20112011
HPCA 19981998
HPCA 19971997
HPCA 19961996
ASPLOS 19911991
DAC 19871987

Wrote 6 papers:

DATE-2011-TendulkarPNKNK #communication #hardware #runtime
Fine-grain OpenMP runtime support with explicit communication hardware primitives (PT, VP, GN, SGK, DSN, MK), pp. 891–894.
Credit-Flow-Controlled ATM for MP Interconnection: The ATLAS I Single-Chip ATM Switch (MK, DNS, ES), pp. 47–56.
HPCA-1997-MarkatosK #kernel #operating system
User-Level DMA without Operating System Kernel Modification (EPM, MK), pp. 322–331.
HPCA-1996-MarkatosK #clustering #named #network #parallel
Telegraphos: High-Performance Networking for Parallel Processing on Workstation Clusters (EPM, MK), pp. 144–153.
ASPLOS-1991-KatevenisT #branch #memory management
Reducing the Branch Penalty by Rearranging Instructions in Double-Width Memory (MK, NT), pp. 15–27.
DAC-1987-VladimirescuWKBKDNJL #hardware #simulation
A Vector Hardware Accelerator with Circuit Simulation Emphasis (AV, DW, MK, ZB, AK, KD, KCN, NJ, SL), pp. 89–94.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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