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Travelled to:
1 × Spain
1 × USA
Collaborated with:
P.K.Pandya S.Mohalik A.C.Rajeev M.G.Dixit S.Ramesh S.Jiang
Talks about:
time (2) end (2) determin (1) automata (1) transit (1) express (1) analysi (1) system (1) silent (1) latenc (1)

Person: P. Vijay Suman

DBLP DBLP: Suman:P=_Vijay

Contributed to:

LATA 20092009
DAC 20082008

Wrote 2 papers:

LATA-2009-SumanP #automaton #integer
Determinization and Expressiveness of Integer Reset Timed Automata with Silent Transitions (PVS, PKP), pp. 728–739.
DAC-2008-MohalikRDRSPJ #analysis #embedded #latency #model checking #realtime
Model checking based analysis of end-to-end latency in embedded, real-time systems with clock drifts (SM, ACR, MGD, SR, PVS, PKP, SJ), pp. 296–299.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.