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Travelled to:
1 × Italy
1 × Singapore
1 × USA
1 × United Kingdom
Collaborated with:
S.Mitra M.Viswanathan M.V.0001 S.Bak C.Fan M.Potok P.Prabhakar L.Wang C.A.Muñoz B.Qi
Talks about:
system (3) hybrid (3) verif (3) model (3) reachabl (2) linear (2) simul (2) base (2) rectangular (1) powertrain (1)

Person: Parasara Sridhar Duggirala

DBLP DBLP: Duggirala:Parasara_Sridhar

Contributed to:

CAV 20152015
TACAS 20152015
FM 20142014
VMCAI 20132013
CAV (1) 20162016
CAV (1) 20172017

Wrote 7 papers:

CAV-2015-DuggiralaFM0 #challenge #verification
Meeting a Powertrain Verification Challenge (PSD, CF, SM, MV), pp. 536–543.
TACAS-2015-DuggiralaMVP #modelling #named #verification
C2E2: A Verification Tool for Stateflow Models (PSD, SM, MV, MP), pp. 68–82.
FM-2014-DuggiralaWMVM #modelling #parallel #precedence #protocol
Temporal Precedence Checking for Switched Models and Its Application to a Parallel Landing Protocol (PSD, LW, SM, MV, CAM), pp. 215–229.
VMCAI-2013-PrabhakarDMV #hybrid
Hybrid Automata-Based CEGAR for Rectangular Hybrid Systems (PP, PSD, SM, MV), pp. 48–67.
CAV-2016-Duggirala0 #linear #simulation #verification
Parsimonious, Simulation Based Verification of Linear Systems (PSD, MV0), pp. 477–494.
CAV-2016-FanQM0D #analysis #automation #hybrid #modelling #reachability
Automatic Reachability Analysis for Nonlinear Hybrid Models with C2E2 (CF, BQ, SM, MV0, PSD), pp. 531–538.
CAV-2017-BakD #linear #reachability #scalability
Simulation-Equivalent Reachability of Large Linear Systems with Inputs (SB, PSD), pp. 401–420.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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