BibSLEIGH corpus
BibSLEIGH tags
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BibSLEIGH people
Open Knowledge
XHTML 1.0 W3C Rec
CSS 2.1 W3C CanRec
email twitter
Travelled to:
1 × Austria
1 × France
1 × Portugal
2 × USA
Collaborated with:
V.Sarkar D.Majeti T.Shpeisman R.Surendran J.Zhao S.Agarwal R.K.Shyamasundar K.S.Meel M.Sridharan M.K.Ramanathan M.Chabbi Leonard Truong Ehsan Totoni H.Liu Chick Markley A.Fox R.Kaleem B.T.Lewis C.Hu Y.Ni A.Adl-Tabatabai
Talks about:
regist (2) effici (2) alloc (2) map (2) architectur (1) irregular (1) protocol (1) parallel (1) bitwidth (1) program (1)

Person: Rajkishore Barik

DBLP DBLP: Barik:Rajkishore

Contributed to:

CC 20142014
CGO 20142014
CC 20072007
PPoPP 20072007
CC 20062006
CC 20162016
OOPSLA 20192019
PLDI 20162016

Wrote 8 papers:

CC-2014-SurendranBZS #array #using
Inter-iteration Scalar Replacement Using Array SSA Form (RS, RB, JZ, VS), pp. 40–60.
CGO-2014-BarikKMLSHNA #c++ #performance
Efficient Mapping of Irregular C++ Applications to Integrated GPUs (RB, RK, DM, BTL, TS, CH, YN, ARAT), p. 33.
CC-2007-SarkarB #linear
Extended Linear Scan: An Alternate Foundation for Global Register Allocation (VS, RB), pp. 141–155.
PPoPP-2007-AgarwalBSS #analysis #source code
May-happen-in-parallel analysis of X10 programs (SA, RB, VS, RKS), pp. 183–193.
Enhanced Bitwidth-Aware Register Allocation (RB, VS), pp. 263–276.
CC-2016-MajetiMBS #architecture #automation #cpu #generative #gpu #kernel #layout
Automatic data layout generation and kernel mapping for CPU+GPU architectures (DM, KSM, RB, VS), pp. 240–250.
OOPSLA-2019-BarikSRC #optimisation #protocol
Optimization of swift protocols (RB, MS, MKR, MC), p. 27.
PLDI-2016-TruongBTLMFS #compilation #named #network #performance #runtime
Latte: a language, compiler, and runtime for elegant and efficient deep neural networks (LT, RB, ET, HL, CM, AF, TS), pp. 209–223.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.