BibSLEIGH — Ali-Reza

Travelled to:

1 × Cyprus
1 × Italy
16 × USA
3 × Canada

Collaborated with:

T.R.Gross T.Shpeisman B.Saha V.Menon R.L.Hudson B.R.Murphy A.Welc G.Lueh C.Kozyrakis F.T.Schneider B.Hertzberg B.T.Lewis X.Tian R.Narayanaswamy H.Volos M.Cierniak J.M.Stichnoth Y.Ni M.J.Serrano S.Subramoney G.Langdale S.Lucco R.Wahbe C.Wang W.Chen Y.Wu C.C.Minh V.M.Parikh L.Ziarek S.Jagannathan P.McGachey D.Dice M.Herlihy N.Shavit C.v.Praun M.L.Scott N.Glew A.McCreight L.Petersen R.Barik R.Kaleem D.Majeti C.Hu S.Balensiefer D.Grossman K.F.Moore A.L.Hosking J.E.B.Moss J.Bharadwaj M.Eng J.Fang M.Bach S.Berkowits J.Cownie R.Geva S.Kozhukow J.Olivier S.Preis A.Tal

Talks about:

transact (12) memori (8) optim (5) code (5) effici (4) compil (4) implement (3) softwar (3) program (3) languag (3)

Person: Ali-Reza Adl-Tabatabai

DBLP: Adl-Tabatabai:Ali=Reza

Contributed to:

2014

2009

2008

2007

2006

2004

1998

1996

1993

Wrote 25 papers:

CGO-2014-BarikKMLSHNA #c++ #performance: Efficient Mapping of Irregular C++ Applications to Integrated GPUs (RB, RK, DM, BTL, TS, CH, YN, ARAT), p. 33.
ECOOP-2009-VolosWASTN #design #implementation #memory management #named #parallel #transaction: NePaLTM: Design and Implementation of Nested Parallelism for Transactional Memory Systems (HV, AW, ARAT, TS, XT, RN), pp. 123–147.
PPoPP-2009-VolosWASTN #design #implementation #memory management #named #parallel #transaction: NePalTM: design and implementation of nested parallelism for transactional memory systems (HV, AW, ARAT, TS, XT, RN), pp. 291–292.
CGO-2008-MurphyMSSA #type safety: Fault-safe code motion for type-safe languages (BRM, VM, FTS, TS, ARAT), pp. 144–154.
ECOOP-2008-ZiarekWAMSJ #execution #java #transaction: A Uniform Transactional Execution Environment for Java (LZ, AW, ARAT, VM, TS, SJ), pp. 129–154.
OOPSLA-2008-NiWABBCGKNOPSTT #c #c++ #design #implementation #transaction: Design and implementation of transactional constructs for C/C++ (YN, AW, ARAT, MB, SB, JC, RG, SK, RN, JO, SP, BS, AT, XT), pp. 195–212.
OOPSLA-2008-SchneiderMSA #optimisation #performance: Dynamic optimization for efficient strong atomicity (FTS, VM, TS, ARAT), pp. 181–194.
PPoPP-2008-McGacheyAHMSS #concurrent #garbage collection #memory management #transaction: Concurrent GC leveraging transactional memory (PM, ARAT, RLH, VM, BS, TS), pp. 217–226.
CGO-2007-WangCWSA #code generation #memory management #optimisation #transaction: Code Generation and Optimization for Transactional Memory Constructs in an Unmanaged Language (CW, WYC, YW, BS, ARAT), pp. 34–48.
PLDI-2007-ShpeismanMABGHMS #order: Enforcing isolation and ordering in STM (TS, VM, ARAT, SB, DG, RLH, KFM, BS), pp. 78–88.
PPoPP-2007-Adl-TabatabaiDHSKPS #transaction: Potential show-stoppers for transactional synchronization (ARAT, DD, MH, NS, CK, CvP, MLS), p. 55.
PPoPP-2007-Adl-TabatabaiKS #manycore #programming #transaction: Transactional programming in a multi-core environment (ARAT, CK, BS), p. 272.
PPoPP-2007-NiMAHHMSS #memory management #transaction: Open nesting in software transactional memory (YN, VM, ARAT, ALH, RLH, JEBM, BS, TS), pp. 68–78.
ISMM-2006-HudsonSAH #memory management #named #scalability #transaction: McRT-Malloc: a scalable transactional memory allocator (RLH, BS, ARAT, BH), pp. 74–83.
PLDI-2006-Adl-TabatabaiLMMSS #compilation #memory management #performance #runtime #transaction: Compiler and runtime support for efficient software transactional memory (ARAT, BTL, VM, BRM, BS, TS), pp. 26–37.
POPL-2006-MenonGMMSAP #compilation #optimisation #representation: A verifiable SSA program representation for aggressive compiler optimization (VM, NG, BRM, AM, TS, ARAT, LP), pp. 397–408.
PPoPP-2006-SahaAHMH #manycore #memory management #named #performance #runtime #transaction: McRT-STM: a high performance software transactional memory system for a multi-core runtime (BS, ARAT, RLH, CCM, BH), pp. 187–197.
CGO-2004-Adl-TabatabaiBCEFLMS #java #performance: Improving 64-Bit Java IPF Performance by Compressing Heap References (ARAT, JB, MC, ME, JF, BTL, BRM, JMS), pp. 100–110.
PLDI-2004-Adl-TabatabaiHSS #hardware #metadata #monitoring: Prefetch inection based on hardware monitoring and object metadata (ARAT, RLH, MJS, SS), pp. 267–276.
PLDI-1998-Adl-TabatabaiCLPS #code generation #compilation #effectiveness #java #performance: Fast, Effective Code Generation in a Just-In-Time Java Compiler (ARAT, MC, GYL, VMP, JMS), pp. 280–290.
OOPSLA-1996-Adl-TabatabaiGL #compilation #optimisation #reuse: Code Reuse in an Optimizing Compiler (ARAT, TRG, GYL), pp. 51–68.
PLDI-1996-Adl-TabatabaiG #debugging: Source-Level Debugging of Scalar Optimized Code (ARAT, TRG), pp. 33–43.
PLDI-1996-Adl-TabatabaiLLW #independence #mobile #performance #source code: Efficient and Language-Independent Mobile Programs (ARAT, GL, SL, RW), pp. 127–136.
PLDI-1993-Adl-TabatabaiG #detection #scheduling: Detection and Recovery of Endangered Variables Caused by Instruction Scheduling (ARAT, TRG), pp. 13–25.
POPL-1993-Adl-TabatabaiG #debugging #interactive: Evicted Variables and the Interaction of Global Register Allocation and Symbolic Debugging (ARAT, TRG), pp. 371–383.