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Travelled to:
1 × France
1 × United Kingdom
Collaborated with:
R.Puigjaner A.Benzekri R.H.Pierce R.Ward J.Stevens H.Clifton J.Galle
Talks about:
perform (2) system (2) time (2) real (2) constraint (1) process (1) verifi (1) requir (1) design (1) captur (1)

Person: Sandra Ayache

DBLP DBLP: Ayache:Sandra

Contributed to:

Ada-Europe 19971997
CAiSE 19931993

Wrote 2 papers:

AdaEurope-1997-PierceAWSCG #performance #realtime #requirements #verification
Capturing and Verifying Performance Requirements for Hard Real Time Systems (RHP, SA, RW, JS, HC, JG), pp. 137–148.
CAiSE-1993-PuigjanerBA #constraints #design #embedded #estimation #performance #process #realtime
Estimation Process of Performance Constraints during the design of Real-Time & Embedded Systems (RP, AB, SA), pp. 629–648.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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