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Travelled to:
2 × USA
Collaborated with:
J.M.Geyer D.L.Roberts
Talks about:
placement (1) conductor (1) algorithm (1) linear (1) layout (1) assign (1) singl (1) modul (1) layer (1) mask (1)

Person: Sheldon B. Akers

DBLP DBLP: Akers:Sheldon_B=

Contributed to:

DAC 19811981
DAC 19701970

Wrote 2 papers:

DAC-1981-Akers #algorithm #linear #on the #using
On the use of the linear assignment algorithm in module placement (SBA), pp. 137–144.
DAC-1970-AkersGR #layout
IC mask layout with a single conductor layer (SBA, JMG, DLR), pp. 7–16.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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