Travelled to:
1 × USA
Collaborated with:
K.Yoshida T.Mitsuhashi Y.Nakada T.Chiba K.Ogita
Talks about:
circuit (1) system (1) layout (1) integr (1) scale (1) check (1) larg (1)
Person: Shinji Nakatsuka
DBLP: Nakatsuka:Shinji
Contributed to:
Wrote 1 papers:
- DAC-1977-YoshidaMNCON #layout #scalability
- A layout checking system for large scale integrated circuits (KY, TM, YN, TC, KO, SN), pp. 322–330.