Travelled to:
3 × USA
Collaborated with:
T.Mitsuhashi K.Yoshida M.Takashima Y.Nakada K.Ogita S.Nakatsuka
Talks about:
circuit (2) artwork (2) system (2) integr (2) mask (2) program (1) connect (1) analysi (1) verifi (1) layout (1)
Person: Toshiaki Chiba
DBLP: Chiba:Toshiaki
Contributed to:
Wrote 3 papers:
- DAC-1982-TakashimaMCY #source code #verification
- Programs for verifying circuit connectivity of mos/lsi mask artwork (MT, TM, TC, KY), pp. 544–550.
- DAC-1980-MitsuhashiCTY #analysis
- An integrated mask artwork analysis system (TM, TC, MT, KY), pp. 277–284.
- DAC-1977-YoshidaMNCON #layout #scalability
- A layout checking system for large scale integrated circuits (KY, TM, YN, TC, KO, SN), pp. 322–330.